Samsung Electronics Co., Ltd.

Sang Eon Oh

Gu S Kim

Seung H Ahn

Seung Kon Mok

A solder ball grid array carrier package has a circuit board with conductive wirings and a plurality of through holes. At least one semiconductor chip is mounted on an upper surface of the circuit board and bonding wires electrically connect the chip to the conductive wirings. A plurality of solder balls are electrically connected to the conductive wirings, with the solder balls being adhered to a lower surface of the circuit board. A heat sink is also adhered to the lower surface of the circuit board. The heat sink is in direct contact with the through holes of the circuit board, with the through holes allowing for heat dissipation.

Solder ball grid array carrier package with heat sink

A ball grid array package includes a semiconductor chip 4, a circuit board 21 including a plurality of pattern layers of conductive wiring and dielectric layers interposed between the pattern layers which include the first pattern layer 22 and the second pattern layer 23. Electrically conductive wires are provided for interconnecting the semiconductor chip and the conductive wiring, mold resin 4 encapsulates the semiconductor chip and the wiring, and a plurality of solder balls 5 are adhered to a bottom surface of the circuit board 21 and electrically interconnected to the wires via the pattern layers. The surface mounting pad 22 is formed on the first pattern layer and a second conductive pad is formed on the second pattern layer. The first pattern layer is an outermost layer of the circuit board and the second pattern layer is just inside of the first layer so that the first and the second conductive pads form a solder ball groove mounting pad wherein a bottom surface of the mounting pad is the second conductive pad and the first conductive pad extends to the surface of the mounting pad.

Printed circuit board having solder ball mounting groove pads and a ball

A semiconductor memory module is formed of semiconductor packages respectively having at least one defect data line combined to be mounted to a module substrate which has two rows of auxiliary pads for excluding the defect data line of the mounted semiconductor packages from overall data lines of the module to thus attain more than a required memory capacity. By connecting the auxiliary pads with coupling units of resistors or jumper cables to isolate the defect data lines, the semiconductor memory module achieves the required memory capacity and utilizes defective semiconductor packages to reduce manufacturing costs, to attain excellent compatibility resulting from employing all kinds of semiconductor packages, and to simplify the data line connection process. Further, reworking semiconductor package is easy which improves yield, and humid air is prevented from permeating into the interior of the molding resin thereby preventing failures such as disconnection of wires and improving reliability.

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Seongnam, South Korea

Sang Eon Oh