Applied Materials, Inc.

Intermolecular, Inc.

Sandeep Nijhawan

Lori D Washington

Jacob W Smith

David P Bour

Philip Allan Kraus

Jeroen Van Duren

Ronald R Stevens

Minh Le

Thai Cheng Chua

Nyi O Myo

Haifan Liang

Brian Hayes Burrows

Alexander Tam

Sang M Lee

Jie Su

Jacob Grayson

Wei Liu

Kenric T Choi

David J Eaglesham

Sumedh Acharya

Teresa B Sapirman

James D Felsch

Olga Kryliouk

Garry K Kwong

Jianhua Hu

Hua Chung

David K Carlson

Tetsuya Ishikawa

Son Truong Nguyen

Anzhong Chang

Yuriy Melnik

David H Quach

Lily L Pang

Minh Anh Nguyen

Tong Ju

Sang Won Kang

Dong Hyung Lee

Anand Vasudev

Brendan McDougall

Harsukhdeep S Ratia

Yoga Saripalli

Boris Borisov

Steve Park

Rosemary Twist

Heng-Kai Hsu

Heng Kai Hsu

Minh-Huu Le

A method and apparatus for removing deposition products from internal surfaces of a processing chamber, and for preventing or slowing growth of such deposition products. A halogen containing gas is provided to the chamber to etch away deposition products. A halogen scavenging gas is provided to the chamber to remove any residual halogen. The halogen scavenging gas is generally activated by exposure to electromagnetic energy, either inside the processing chamber by thermal energy, or in a remote chamber by electric field, UV, or microwave. A deposition precursor may be added to the halogen scavenging gas to form a deposition resistant film on the internal surfaces of the chamber. Additionally, or alternately, a deposition resistant film may be formed by sputtering a deposition resistant metal onto internal components of the processing chamber in a PVD process.

Method of decontamination of process chamber after in-situ chamber clean

A method and apparatus that may be utilized for chemical vapor deposition and/or hydride vapor phase epitaxial (HVPE) deposition are provided. In one embodiment, a metal organic chemical vapor deposition (MOCVD) process is used to deposit a Group III-nitride film on a plurality of substrates. A Group III precursor, such as trimethyl gallium, trimethyl aluminum or trimethyl indium and a nitrogen-containing precursor, such as ammonia, are delivered to a plurality of straight channels which isolate the precursor gases. The precursor gases are injected into mixing channels where the gases are mixed before entering a processing volume containing the substrates. Heat exchanging channels are provided for temperature control of the mixing channels to prevent undesirable condensation and reaction of the precursors.

Multi-gas straight channel showerhead

A substrate having a plurality of site-isolated regions defined thereon is provided. A first electrochromic material, or a first electrochromic device stack, is formed above a first of the plurality of site-isolated regions using a first set of processing conditions. A second electrochromic material, or a second electrochromic device stack, is formed above a second of the plurality of site-isolated regions using a second set of processing conditions. The second set of processing conditions is different than the first set of processing conditions.

Combinatorial methods for developing electrochromic materials and devices

Transparent conductive layers usable as ohmic contacts for III-V semiconductors with work functions between 4.1 and 4.7 eV are formed by annealing layers of transparent oxide with thin (0.1-5nm) layers of conductive metal. When the layers interdiffuse during the annealing, some of the conductive metal atoms remain free to reduce resistivity and others oxidize to reduce optical absorption. Examples of the transparent oxides include indium-tin oxide, zinc oxide, and aluminum zinc oxide with up to 5 wt % Al. Examples of the metals include aluminum and titanium. The work function of the transparent conductive layer can be tuned to match the contacted semiconductor by adjusting the ratio of metal to transparent oxide.

Oxides with thin metallic layers as transparent ohmic contacts for p-type and n-type gallium nitride

Transparent ohmic contacts to p-GaN and other high-work-function (&#x2267;4.2 eV) semiconductors are fabricated from zinc stannate (e.g., ZnSnO). ZnO and SnOmay be sputtered from separate targets and annealed to form the zinc stannate. The Zn:Sn ratio may be tuned over the range between 1:2 and 2:1 to optimize bandgap, work function, conductivity, and transparency for the particular semiconductor and wavelength of interest. Conductivity may be improved by crystallizing the zinc stannate, by doping with up to 5 wt % Al or In, or both.

Zinc stannate ohmic contacts for p-type gallium nitride

Methods for HPC techniques are applied to the processing of site-isolated regions (SIR) on a substrate to form at least a portion of a TFT device used in display applications. The processing may be applied to at least one of gate electrode deposition, gate electrode patterning, gate dielectric deposition, gate dielectric patterning, metal-based semiconductor material (e.g. IGZO) deposition, metal-based semiconductor material (e.g. IGZO) patterning, etch stop deposition, etch stop patterning, source/drain deposition, source/drain patterning, passivation deposition, or passivation patterning. The SIRs may be defined during the deposition process with uniform deposition within each SIR or the SIRs may be defined subsequent to the deposition of layers wherein the layers are deposited with a gradient in one or more properties across the substrate.

High productivity combinatorial screening for stable metal oxide TFTs

A method for fabricating high efficiency CIGS solar cells including the deposition of Ga concentrations (Ga/(Ga+In)=0.25-0.66) from sputtering targets containing Ga concentrations between about 25 atomic % and about 66 atomic %. Further, the method includes a high temperature selenization process integrated with a high temperature anneal process that results in high efficiency.

Method of fabricating high efficiency CIGS solar cells

A method for fabricating high efficiency CIGS solar cells including the deposition of Ga concentrations (Ga/(Ga+In)=0.25&#x2212;0.66) from sputtering targets containing Ga concentrations between about 25 atomic % and about 66 atomic %. Further, the method includes a high temperature selenization process integrated with a high temperature anneal process that results in high efficiency.

A method for high temperature selenization of Cu&#x2014;In&#x2014;Ga metal precursor films comprises ramping the precursor film to a temperature between about 350 C and about 450 C in an inert gas and at a pressure between about 1 atmosphere and about 2 atmospheres. A partial selenization is performed at a temperature between about 350 C and about 450 C in a Se-containing atmosphere. The film is then ramped to a temperature between about 450 C and about 550 C in an inert gas and at a pressure between about 1 atmosphere and about 2 atmospheres, followed by an additional selenization step at a temperature between about 450 C and about 550 C in a Se-containing atmosphere. The film is then annealed at a temperature between about 550 C and about 650 C in an inert gas.

Method of uniform selenization and sulfurization in a tube furnace

Devices are described including a first component and a second component, wherein the first component comprises a Group III-N semiconductor and the second component comprises a bimetallic oxide containing tin, having an index of refraction within 15% of the index of refraction of the Group III-N semiconductor, and having negligible extinction coefficient at wavelengths of light emitted or absorbed by the Group III-N semiconductor. The first component is in optical contact with the second component. Exemplary bimetallic oxides include SnBiOwhere x&#x2245;0.10, ZnSnO, SnAlOwhere x&#x2245;0.18, and SnMgOwhere x&#x2245;0.16. Methods of making and using the devices are also described.

Index-matched insulators

HPC techniques are applied to the screening and evaluating the materials, process parameters, process sequences, and post deposition treatment processes for the development of ohmic contact stacks for optoelectronic devices. Simple test structures are employed for initial screening of basic materials properties of candidate materials for each layer within the stack. The use of multiple site-isolated regions on a single substrate allows many material and/or process conditions to be evaluated in a timely and cost effective manner. Interactions between the layers as well as interactions with the substrate can be investigated in a straightforward manner.

HPC optimization of contacts to optoelectronic devices

Methods and apparatus for depositing thin films incorporating the use of a surfactant are described. Methods and apparatuses include a deposition process and system comprising multiple isolated processing regions which enables rapid repetition of sub-monolayer deposition of thin films. The use of surfactants allows the deposition of high quality epitaxial films at lower temperatures having low values of surface roughness. The deposition of Group III-V thin films such as GaN is used as an example.

GaN epitaxy with migration enhancement and surface energy modification

A method and apparatus for the deposition of thin films is described. In embodiments, systems and methods for epitaxial thin film formation are provided, including systems and methods for forming binary compound epitaxial thin films. Methods and systems of embodiments of the invention may be used to form direct bandgap semiconducting binary compound epitaxial thin films, such as, for example, GaN, InN and AlN, and the mixed alloys of these compounds, e.g., (In, Ga)N, (Al, Ga)N, (In, Ga, Al)N. Methods and apparatuses include a multistage deposition process and system which enables rapid repetition of sub-monolayer deposition of thin films.

Methods and systems for forming thin films

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Los Altos, CA, United States of America

Sandeep Nijhawan