Lam Research Corporation

Applied Materials, Inc.

Novellus Systems Incorporated

S M Reza Sadjadi

Sangheon Lee

Eric A Hudson

Jisoo Kim

Sean S Kang

Peter Cirigliano

Ji Soo Kim

Zhi-Song Huang

Zhisong Huang

Helen H Zhu

Dongho Heo

Si Yi Li

David R Pirkle

Wan-Lin Chen

Conan Chiang

Andrew R Romano

Daehan Choi

Jeffrey S Marks

Vinay Pohray

Dae-Han Choi

Dmitry Lubomirsky

Andrew D Bailey, Iii

Eric H Lenz

Douglas L Keil

Hamid Noorbakhsh

Nicolas J Bright

Mark Henry Wilcoxson

Lumin Li

David H Quach

James V Tietz

Robert Charatan

Michael Goss

Amit Jain

Supriya Goyal

John Zheng Ye

Gan Ming Zhao

SiYi Li

Steve Lassig

Rajinder Dhindsa

Alexei Marakhtanov

Felix Leib Kozakevich

Tza-Jing Gung

Mukund Srinivasan

Chunlei Zhang

Thomas W Mountsier

Haitao Wang

Jie Zhou

Fernando Silveira

James R Bowers

Aaron Eppler

Camelia Rusu

Jun Shinagawa

Siyi Li

Tamarak Pandhumsoporn

Raj Dhindsa

Dave Trussell

Chiu Chi

Jackie Seto

Patrick Chung

Jose Tong Sam

Stephan Lassig

Kuo-Lung Tang

Dae-han Choi

Subhash Deshmukh

Bryan A Helmer

Hanzhong Xiao

Deepak K Gupta

Jim Tietz

Andrew S Li

In some embodiments, a plasma processing apparatus includes a processing chamber to process a substrate; a mounting surface defined within the processing chamber to support a substrate disposed within the processing chamber; a showerhead disposed within the processing chamber and aligned so as to face the mounting surface, the showerhead defining a plurality of orifices to introduce a process gas into the processing chamber toward a substrate disposed within the processing chamber; and one or more magnets supported by the showerhead and arranged so that a radial component of a magnetic field applied by each of the one or more magnets has a higher flux density proximate a first region corresponding to an edge surface region of a substrate when disposed within the processing chamber than at a second region corresponding to an interior surface region of a substrate when disposed within the processing chamber.

Systems and methods for electrical and magnetic uniformity and skew tuning in plasma processing reactors

A dynamically tunable process kit, a processing chamber having a dynamically tunable process kit, and a method for processing a substrate using a dynamically tunable process kit are provided. The dynamically tunable process kit allows one or both of the electrical and thermal state of the process kit to be changed without changing the physical construction of the process kit, thereby allowing plasma properties, and hence processing results, to be easily changed without replacing the process kit. The processing chamber having a dynamically tunable process kit includes a chamber body that includes a portion of a conductive side wall configured to be electrically controlled, and a process kit. The processing chamber includes a first control system operable to control one or both of an electrical and thermal state of the process kit and a second control system operable to control an electrical state of the portion of the side wall.

Methods and apparatus for controlling substrate uniformity

A method for depositing a conformal film on a substrate in a plasma processing chamber of a plasma processing system, the substrate being disposed on a chuck, the chuck being coupled to a cooling apparatus, is disclosed. The method includes flowing a first gas mixture into the plasma processing chamber at a first pressure, wherein the first gas mixture includes at least carbon, and wherein the first gas mixture has a condensation temperature. The method also includes cooling the chuck below the condensation temperature using the cooling apparatus thereby allowing at least some of the first gas mixture to condense on a surface of the substrate. The method further includes venting the first gas mixture from the processing chamber; flowing a second gas mixture into the plasma processing chamber, the second gas mixture being different in composition from the first gas mixture; and striking a plasma to form the conformal film.

Apparatus for the deposition of a conformal film on a substrate and methods therefor

A method for forming an array area with a surrounding periphery area, wherein a substrate is disposed under an etch layer, which is disposed under a patterned organic mask defining the array area and covers the entire periphery area is provided. The patterned organic mask is trimmed. An inorganic layer is deposited over the patterned organic mask where a thickness of the inorganic layer over the covered periphery area of the organic mask is greater than a thickness of the inorganic layer over the array area of the organic mask. The inorganic layer is etched back to expose the organic mask and form inorganic spacers in the array area, while leaving the organic mask in the periphery area unexposed. The organic mask exposed in the array area is stripped, while leaving the inorganic spacers in place and protecting the organic mask in the periphery area.

Spacer formation for array double patterning

An apparatus for etching an etch layer formed on a substrate is provided. A first photoresist (PR) mask with first mask features is provided on the etch layer. The apparatus performs a process for providing a protective coating on the first PR mask. The process includes at least one cycle. Each cycle includes (a) a deposition phase for depositing a deposition layer over the surface of the first mask features using a deposition gas, and (b) a profile shaping phase for shaping the profile of the deposition layer using a profile shaping gas. A liquid PR material is applied over the first PR mask having the protective coating. The PR material is patterned into a second mask features, where the first and second mask features form a second PR mask. The etch layer is etched though the second PR mask.

Photoresist double patterning apparatus

A method for reducing capacitances between semiconductor devices is provided. A plurality of contact structures is formed in a dielectric layer. A mask is formed to cover the contact structures wherein the mask has mask features for exposing parts of the dielectric layer wherein the mask features have widths. The widths of the mask features are shrunk with a sidewall deposition. Gaps are etched into the dielectric layer through the sidewall deposition. The gaps are closed to form pockets in the gaps.

Device with gaps for capacitance reduction

A method for etching a dielectric layer is provided. A patterned mask with mask features is formed over a dielectric layer. The mask has isolated areas and dense areas of the mask features. The mask is trimmed by a plurality of cycles, where each cycle includes depositing a deposition layer, and selectively etching the deposition layer and the patterned mask. The selective etching selectively trims the isolated areas of the mask with respect to the dense areas of the mask. The dielectric layer is etched using the thus trimmed mask. The mask is removed.

Mask trimming

A method for forming a feature in an etch layer is provided. A photoresist layer is formed over the etch layer. The photoresist layer is patterned to form photoresist features with photoresist sidewalls. A control layer is formed over the photoresist layer and bottoms of the photoresist features. A conformal layer is deposited over the sidewalls of the photoresist features and control layer to reduce the critical dimensions of the photoresist features. Openings in the control layer are opened with a control layer breakthrough chemistry. Features are etched into the etch layer with an etch chemistry, which is different from the control layer break through chemistry, wherein the control layer is more etch resistant to the etch with the etch chemistry than the conformal layer.

Critical dimension reduction and roughness control

A method for etching an etch layer disposed over a substrate and below an antireflective coating (ARC) layer and a patterned organic mask with mask features is provided. The substrate is placed in a process chamber. The ARC layer is opened. An oxide spacer deposition layer is formed. The oxide spacer deposition layer on the organic mask is partially removed, where at least the top portion of the oxide spacer deposition layer is removed. The organic mask and the ARC layer are removed by etching. The etch layer is etched through the sidewalls of the oxide spacer deposition layer. The substrate is removed from the process chamber.

Pitch reduction using oxide spacer

A method for implanting a dopant in a substrate is provided. A patterned photoresist mask is formed over the substrate, wherein the patterned photoresist mask has patterned photoresist mask features. A protective layer is deposited on the patterned photoresist mask by performing a cyclical deposition, wherein each cycle, comprises a depositing phase for depositing a deposition layer over surfaces of the patterned mask of photoresist material and a profile shaping phase for providing vertical sidewalls. A dopant is implanted into the substrate using an ion beam. The protective layer and photoresist mask are removed.

Protective layer for implant photoresist

A plasma chamber with a plasma confinement zone with an electrode is provided. A gas distribution system for providing a first gas and a second gas is connected to the plasma chamber, wherein the gas distribution system can substantially replace one gas in the plasma zone with the other gas within a period of less than 1 s. A first frequency tuned RF power source for providing power to the electrode in a first frequency range is electrically connected to the at least one electrode wherein the first frequency tuned RF power source is able to minimize a reflected RF power. A second frequency tuned RF power source for providing power to the plasma chamber in a second frequency range outside of the first frequency range wherein the second frequency tuned RF power source is able to minimize a reflected RF power.

Fast gas switching plasma processing apparatus

A method for etching an etch layer formed on a substrate is provided. A first photoresist (PR) mask with first mask features is provided on the etch layer. A protective coating is provided on the first PR mask by a process including at least one cycle. Each cycle includes (a) a deposition phase for depositing a deposition layer over the surface of the first mask features using a deposition gas, and (b) a profile shaping phase for shaping the profile of the deposition layer using a profile shaping gas. A liquid PR material is applied over the first PR mask having the protective coating. The PR material is patterned into a second mask features, where the first and second mask features form a second PR mask. The etch layer is etched though the second PR mask.

Photoresist double patterning

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Saratoga, CA, United States of America

S M Reza Sadjadi