Fujitsu Corporation

Fujitsu Microelectronics Limited

Ryo Shibata

Takashi Kurihara

Tomohiko Koto

Yukisada Horie

Takeo Moriyama

A method for calculating a tolerable value for simultaneous switching noise in an input/output circuit having a differential input supplied with a power supply voltage. The method includes providing an input/output circuit having a differential input unit with a pulse signal of a predetermined duty ratio, setting a tolerable range for the duty ratio of the output signal of the input/output circuit with respect to the pulse signal, changing the power supply voltage supplied to the differential input unit of the input/output circuit, measuring the duty ratio of the output signal corresponding to the voltage change, comparing the measured duty ratio with the tolerable range, and calculating a tolerable value for the simultaneous switching noise.

Method for calculating tolerable value for fluctuation in power supply voltage and method of testing

A method of preparing layout data of patterns formed in a scribe area. First, library data on which a plurality of patterns and arrangement limiting conditions of each pattern and arrangement importance of each pattern are registered is prepared. A pattern to be arranged in the scribe area is selected from the library data. Then, the selected pattern in the scribe area is arranged in accordance with the arrangement limiting conditions and arrangement importance of the selected pattern. In this method, it is not necessary to prepare many arrangement models, so that preparing time of layout data is shortened.

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Kasugai, Japan

Ryo Shibata