Qualcomm Incorporated

Ryan Michael Coutts

Mehdi Saeidi

Rajat Mittal

Paul Penzes

Mikhail Popovich

Dipti Ranjan Pal

Arpit Mittal

Shih-Hsin Jason Hu

Mohamed Waleed Allam

Yuancheng Christopher Pan

Melika Roshandell

Vivek Sahu

Samy Shafik Tawfik Zaynoun

Wai Kit Siu

Paul Ivan Penzes

In one embodiment, a temperature management system comprises a plurality of thermal sensors at different locations on a chip, and a temperature manager. The temperature manager is configured to receive a plurality of temperature readings from the thermal sensors, to fit a quadratic temperature model to the received temperature readings, and to estimate a hotspot temperature on the chip using the fitted quadratic temperature model.

Thermal sensor placement for hotspot interpolation

The disclosure generally relates to a hybrid design whereby a heat spreader arranged to reduce an external skin temperature on a handheld device may further enable the external skin temperature to be directly measured. For example, the heat spreader may be thermally coupled to at least one external surface and include at least one region in which a plurality of recesses are formed such that an electrical resistance is produced in the at least one region when a current is applied thereto. The heat spreader may be formed from a material having a substantially linear resistance-to-temperature correlation, whereby the electrical resistance produced in the at least one region may be measured and correlated to a temperature on the at least one external surface.

Hybrid design of heat spreader and temperature sensor for direct handheld device skin temperature measurement

In one embodiment, a method of temperature control comprises receiving temperature readings from a temperature sensor on a chip, calculating one or more second derivatives of temperature with respect to time based on the temperature readings, and determining whether to perform temperature mitigation on the chip based on the one or more calculated second derivatives of temperature.

Systems and methods for detecting thermal runaway

Various aspects of this disclosure describe measuring timing slack using an endpoint criticality sensor on a chip. A sensor circuit is attached to sensitive endpoints on the chip (e.g., logical gates in a timing critical path) so that the sensor circuit receives the endpoint's data signal and clock signal. The sensor circuit introduces skew between the data signal and the clock signal by delaying the data signal more than the clock signal, and compares skewed data signals to determine if an error occurs because of the induced skew. By delaying the data signal with different delay amounts and monitoring what delays cause errors, an amount of timing slack in the data signal and clock signal (e.g., margin to criticality) is measured during operation of the chip for relevant circuitry to the system implemented on the chip, compared to test circuitry operating while the chip is in a test mode.

Estimating timing slack with an endpoint criticality sensor circuit

An electronic device includes an integrated circuit, a flexible heat spreader, an actuator, and a controller. The actuator is coupled to the flexible heat spreader and the controller is configured to control the actuator between a first actuation mode and a second actuation mode. When in the first actuation mode, the actuator positions the flexible heat spreader with an air gap between the flexible heat spreader and the integrated circuit such that the flexible heat spreader is thermally separated from the integrated circuit to increase a thermal impedance between the flexible heat spreader and the integrated circuit. When in the second actuation mode, the actuator positions the flexible heat spreader in thermal contact with the integrated circuit without the air gap there between to reduce the thermal impedance between the flexible heat spreader and the integrated circuit.

Thermal modulation of an electronic device

Aspects of an integrated circuit are disclosed. The integrated circuit includes a first circuit configured to be powered by a first voltage source, a second circuit configured to be powered by a second voltage source, a decoupling capacitor, and a controller configured to switch the decoupling capacitor between the first and second voltage source.

Switchable decoupling capacitors

A mobile device includes an exterior housing, a display, a capacitive sensor, a temperature sensor, and a controller. The capacitive sensor is coupled to the exterior housing at a backside of the mobile device and the temperature sensor is coupled to one or more components of the mobile device. The controller is coupled to the capacitive sensor and to the temperature sensor. The controller is configured to adjust a temperature threshold of the mobile device in response to detecting the presence of a case installed on the exterior housing. The controller is also configured to adjust one or more operating parameters of the mobile device to control a temperature of the exterior housing to below the temperature threshold based on the output of the capacitive sensor and one or more readings of the temperature sensor.

Mobile device with backside capacitive sensor for thermal management of an exterior housing

A method of setting a supply voltage in a device is disclosed. The method includes receiving a first plurality of inputs from a plurality of sensors that are representative of a gate delay of a signal path on the device, and receiving a second plurality of inputs from a plurality of temperature sensors. The method further includes estimating a plurality of interconnect delays for the signal path based on the second plurality of inputs, and determining the supply voltage for the signal path based on the first plurality of inputs and the plurality of interconnect delays.

Adaptive voltage scaling using analytical models for interconnect delay

Techniques for estimating state-dependent capacitance of a circuit are described herein. In one embodiment, a method for determining a circuit state for a circuit comprises determining a capacitance of the circuit for each one of a plurality of circuit states, and selecting one of the circuit states based on the determined capacitances.

State-dependent capacitance estimation

In one embodiment, an apparatus comprises a capacitor and a die. The die comprises a resistor switch coupled between a power line and the capacitor, wherein the resistor switch has an adjustable resistance, and the power line and the capacitor are both external to the die. The die also comprises a circuit configured to receive power from the power line, and a controller configured to open the resistor switch if the power line is powered down.

Switchable package capacitor for charge conservation and series resistance

Systems and methods for controlling a frequency of a clock signal by selectively swallowing pulses in the clock signal are described herein. In one embodiment, a method for adjusting a frequency of a clock signal comprises receiving the clock signal, and swallowing pulses in the clock signal according to a repeating clock-swallowing pattern, wherein the pattern is defined by a sequence of numbers.

Clock swallowing device for reducing voltage noise

A package substrate is provided that includes a substrate and a capacitor. The substrate comprises a cavity penetrating a core layer and metal layers of the substrate. The capacitor comprises electrode pads and is disposed in the cavity. One of the metal layers of the substrate includes a discontinuous metal plane, and the electrode pads directly contact the discontinuous metal plane.

Plane connected embedded substrate capacitor

Circuits and methods for reducing leakage are provided. In one example, a system includes circuitry to reset a particular logic circuit to a state of reduced leakage. The state of reduced leakage would be known beforehand for the logic circuit. In this example, the logic circuit includes the combinational logic as well as flip flops that output a state to the combinational logic. Some of the flip flops are 'SET' flip flops (assuming a 1 output value when a reset input is asserted) and some of the flip flops are 'RESET' flip flops (assuming a 0 value when a reset input is asserted). The flip flops are chosen as inputs to the combinational logic so that the particular combination of zeros and ones output to the combinational logic puts the logic circuit in a state that is correlated with a desired level of leakage.

Systems and methods for setting logic to a desired leakage state

Techniques for determining the voltage-dependent capacitance of a circuit are described herein. In one embodiment, a method for determining voltage-dependent capacitance of a circuit comprises measuring a parameter of the circuit at each one of a plurality of voltages, and, for each voltage, determining a capacitance of the circuit at the voltage by fitting a resistor-capacitor (RC) model of the circuit to the measured parameter of the circuit at the voltage.

Voltage dependent die RC modeling for system level power distribution networks

In one embodiment, an apparatus comprises a capacitor and a die. The die comprises a resistor switch coupled between a power line and the capacitor, wherein the resistor switch has an adjustable resistance, and the power line and the capacitor are both external to the die. The die also comprises a circuit configured to receive power from the power line.

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Carlsbad, CA, United States of America

Ryan Michael Coutts