Tower Semiconductor Ltd.

Ruth Shima-Edelstein

Yakov Roizin

Victor Kairys

Anatoly Sergienko

Alex Sirkis

Ronen Shaul

Liz Poliak

Roy Strul

Ido Gilad

Efraim Aloni

Carmel Sahar

Christopher Cork

A method fabricating a GaN based sensor including: forming a gate dielectric layer over a GaN hetero-structure including a GaN layer formed over a substrate and a first barrier layer formed over the GaN layer; forming a first mask over the gate dielectric layer; etching the gate dielectric layer and the first barrier layer through the first mask, thereby forming source and drain contact openings; removing the first mask; forming a metal layer over the gate dielectric layer, wherein the metal layer extends into the source and drain contact openings; forming a second mask over the metal layer; etching the metal layer, the gate dielectric layer and the GaN heterostructure through the second mask, wherein a region of the GaN heterostructure is exposed; and thermally activating the metal layer in the source and drain contact openings. The gate dielectric may exhibit a sloped profile, and dielectric spacers may be formed.

Method of forming a GaN sensor having a controlled and stable threshold voltage in the sensing area

An electrostatically controlled sensor includes a GaN/AlGaN heterostructure having a 2DEG channel in the GaN layer. Source and drain contacts are electrically coupled to the 2DEG channel through the AlGaN layer. A gate dielectric is formed over the AlGaN layer, and gate electrodes are formed over the gate dielectric, wherein each gate electrode extends substantially entirely between the source and drain contacts, wherein the gate electrodes are separated by one or more gaps (which also extend substantially entirely between the source and drain contacts). Each of the one or more gaps defines a corresponding sensing area between the gate electrodes for receiving an external influence. A bias voltage is applied to the gate electrodes, such that regions of the 2DEG channel below the gate electrodes are completely depleted, and regions of the 2DEG channel below the one or more gaps in the direction from source to drain are partially depleted.

Electrostatically controlled gallium nitride based sensor and method of operating same

Method of forming a GaN sensor having a controlled and stable threshold voltage

A UV sensor includes a GaN stack including a low-resistance GaN layer formed over a nucleation layer, and a high-resistance GaN layer formed over the low-resistance GaN layer, wherein a 2DEG conductive channel exists at the upper surface of the high-resistance GaN layer. An AlGaN layer is formed over the upper surface of the high-resistance GaN layer. A source contact and a drain contact extend through the AlGaN layer and contact the upper surface of the high-resistance GaN layer (and are thereby electrically coupled to the 2DEG channel). A drain depletion region extends entirely from the upper surface of the high-resistance GaN layer to the low-resistance GaN layer under the drain contact. An electrical current between the source and drain contacts is a function of UV light received by the GaN stack. An electrode is connected to the low-resistance GaN layer to allow for electrical refresh of the UV sensor.

Gallium nitride based ultra-violet sensor with intrinsic amplification and method of operating same

A self-aligned process for fabricating a non-volatile memory cell having two isolated floating gates. The process includes forming a gate dielectric layer over a semiconductor substrate. A floating gate layer is then formed over the gate dielectric layer. A disposable layer is formed over the floating gate layer, and patterned to form a disposable mask having a minimum line width. Sidewall spacers are formed adjacent to the disposable mask, and source/drain regions are implanted in the substrate, using the disposable mask and the sidewall spacers as an implant mask. The disposable mask is then removed, and the floating gate layer is etched through the sidewall spacers, thereby forming a pair of floating gate regions. The sidewall spacers are removed, and an oxidation step is performed, thereby forming an oxide region that surrounds the floating gate regions. A control gate is then formed over the oxide region.

Self-aligned process for fabricating memory cells with two isolated floating gates

Growing community of inventors

Haifa, Israel

Ruth Shima-Edelstein