University of Electronic Science and Technology of China

Institute of Electronic and Information Engineering of Uestc in Guangdong

Ruidi Wang

Bo Zhang

Ming Qiao

Zhengkang Wang

Yibing Wang

Zhao Qi

Dong Fang

Wenyang Bai

A termination structure of a super-junction power device has a novel polysilicon resistive field plate at the top of a termination region between a transition region and an edge of the device. By utilizing the regular distribution of potential in the field plate, an additional electric field is introduced at the top of the termination structure to limit the expansion of a non-depletion region and optimize the distribution of charges. The termination structure includes a first doping type epitaxial layer, a second doping type compensation region, a second doping type body region, a second doping type lateral connection layer, a second doping type body contact region, a first doping type source contact region, a gate oxide layer, a passivation layer, a field oxide layer, a gate electrode, a second doping type edge contact region, a polysilicon resistive field plate, a metal layer and the like.

Termination structure of super-junction power device comprising plurality of runway-shaped rings as the resistive field plate

A method for manufacturing a semiconductor device is provided. A drift region and a compensation region are formed through a deep trench etching and a filling technology. A plurality of modulation doping regions are formed at a top of the drift region by an epitaxy and an ion implantation. A modulation region is introduced, wherein the modulation region flexibly modifies capacitance characteristics and achieve improved dynamic characteristics.

Semiconductor device and manufacturing method

A split-gate enhanced power MOS device includes a substrate and an epitaxial layer formed on an upper surface of the substrate. A control gate trench is provided in the epitaxial layer. The control gate trench includes a gate electrode and a split-gate electrode. The gate electrode includes a first gate electrode and a second gate electrode. The first gate electrode and the second gate electrode are located in an upper half portion of the control gate trench and are separated by a first dielectric layer. The first gate electrode and the second gate electrode are located above the split-gate electrode and are separated from the split-gate electrode by a second dielectric layer. The first gate electrode and the second gate electrode are separated from a body region in the epitaxial layer by a gate dielectric.

Split-gate enhanced power MOS device

A power semiconductor device including a first conductivity type semiconductor substrate, a drain metal electrode, a first conductivity type semiconductor drift region, and a second conductivity type semiconductor body region. The second conductivity type semiconductor body region includes a first conductivity type semiconductor source region and anti-punch-through structure; the anti-punch-through structure is a second conductivity type semiconductor body contact region or metal structure; the lower surface of the anti-punch-through structure coincides with the upper surface of the first conductivity type semiconductor drift region or the distance between the two is less than 0.5 &#x3bc;m, so that make the device avoid from punch-through. An anti-punch-through structure is introduced at the source end of the device to avoid punch-through breakdown caused by short channel and light-doped body region.

Growing community of inventors

Chengdu, China

Ruidi Wang