Motorola Corporation

Ronald C Pennell

Ira E Baskett

Lynn William Ford

Richard D Catero

Stephen L Lovelis

A method of etching a semiconductor wafer includes providing a wafer having a portion thereof to be etched. A highly doped region is formed in the periphery of the wafer which is subsequently etched. The highly doped region of the wafer is substantially etch resistant to an etchant relative to the portion of the wafer being etched.

Wafer etch protection method

A high voltage thin film transistor structure and method are disclosed which make it possible to fabricate matrix displays with integrated pixel switches on PLZT substrates. A polysilicon transistor capable of withstanding more than 60 V across the source and drain and with a ratio of on to off current in excess of 10.sup.3 is disclosed. The fabrication method disclosed is suitable for use with brittle and readily oxidizable PLZT substrates.

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Chandler, AZ, United States of America

Ronald C Pennell