Intel Corporation

Rohit Grover

Sridhar Govindaraju

Ayan Kar

Kalyan C Kolluru

Erica J Thompson

Nicholas A Thomson

Nabil G Mistkawi

Anindya Dasgupta

Nathan Jack

Rui Ma

Benjamin Orr

An embodiment includes a metal interconnect structure, comprising: a dielectric layer on a substrate; an opening in the dielectric layer, wherein the opening has opening sidewalls and exposes a conductive region of at least one of the substrate and an additional interconnect structure; a first atomic layer deposition (ALD) layer on the conductive region and the opening sidewalls; a second ALD layer on a portion of the first ALD layer, and a third ALD layer within the opening and on the first ALD layer. Other embodiments are described herein.

Using materials with different etch rates to fill trenches in semiconductor devices

Methods for selectively etching titanium and titanium nitride are disclosed. In some embodiments the method involve exposing a workpiece to a first solution to remove titanium nitride, exposing the workpiece to a second solution to remove titanium, and exposing the workpiece to a third solution to remove residual titanium nitride, if any. The solutions are formulated such that they may selectively remove titanium and/or titanium nitride, while not etching or not substantially etching certain other materials such as dielectric materials, oxides, and metals other than titanium.

Technology for selectively etching titanium and titanium nitride in the presence of other materials

Growing community of inventors

West Linn, OR, United States of America

Rohit Grover