Amkor Technology, Inc.

Amkor Technology Singapore Holding Pte. Ltd.

Microchip Technology Inc.

Roger D St Amand

Vladimir Perelman

Robert Francis Darveaux

Ronald Patrick Huemoeller

Jin Seong Kim

Louis W Nicholls

David Jon Hiner

Michael G Kelly

Sung Jin Yang

Woon Kab Jung

Christopher J Berry

Lee Furey

Youbok Lee

Neil F Deutscher

Young Do Kweon

Paul N Katz

Robert P Ma

Alexander William Copia

Fernando Roa

ChangSuk Han

YounSang Kim

KyungRok Park

Joseph A Uradnik

Jan Van Niekerk

Christopher Marc Scanlan

Randy L Yach

Jae Dong Kim

Nozad Karim

Lee John Smith

Sam E Alexander

Jong Ok Chun

Richard J Fisher

August Joseph Miller, Jr

Steven Bible

Joseph Marco Longo

Jingkun Mao

KwangSeok Oh

Wan Wook Ko

Johannes A Van Niekerk

Chang Suk Han

InTae Kim

Farron L Dacus

In one example, a semiconductor device includes a substrate with a top side, a bottom side, and a conductive structure. A first electronic component includes a first side, a second side, and first component terminals adjacent to the first side. The first component terminals face the substrate bottom side and are connected to the conductive structure. A second electronic component comprises a first side, a second side, and second component terminals adjacent to the second electronic component first side. The second electronic component second side is connected to the first electronic component second side with a coupling structure so that the first component terminals and the second component terminals face opposite directions. Interconnects are connected to the conductive structure. The second component terminals and the interconnects are configured for connecting to a next level assembly. Other examples and related methods are also disclosed herein.

Semiconductor devices and methods of manufacturing semiconductor devices

A semiconductor device structure and a method for making a semiconductor device. As non-limiting examples, various aspects of this disclosure provide various semiconductor package structures, and methods for making thereof, that comprise a thin fine-pitch redistribution structure.

Semiconductor package with front side and back side redistribution structures and fabricating method thereof

An electronic device structure and a method for making an electronic device. As non-limiting examples, various aspects of this disclosure provide a method of manufacturing an electronic device that comprises the utilization of a carrier assisted substrate, and an electronic device manufactured thereby.

Carrier assisted substrate method of manufacturing an electronic device and electronic device produced thereby

A stackable package is placed within a mold during an encapsulation operation. A compliant surface, e.g., of a compliant film, of the mold is pressed down on upper interconnection balls of the stackable package to force upper portions of the upper interconnection balls into the mold. However, lower portions of the upper interconnection balls are exposed within a space between the compliant surface and a substrate of the stackable package. The space is filled with a dielectric material to form a package body. The package body is formed while at the same time exposing the upper portions of upper interconnection balls from the package body in a single encapsulation operation. By avoiding selective removal of the package body to expose the upper interconnection balls, the number of operations as well as cost to manufacture the stackable package is minimized.

Stackable package and method

Methods and systems for a thin bonded interposer package are disclosed and may, for example, include bonding a semiconductor die to a first surface of a substrate, forming contacts on the first surface of the substrate, encapsulating the semiconductor die, formed contacts, and first surface of the substrate using a mold material while leaving a top surface of the semiconductor die not encapsulated by mold material, forming vias through the mold material to expose the formed contacts. A bond line may be dispensed on the mold material and the semiconductor die for bonding the substrate to an interposer. A thickness of the bond line may be defined by standoffs formed on the top surface of the semiconductor die.

Thin bonded interposer package

A package includes a substrate having an electronic component flip chip mounted thereto by flip chip bumps. The electronic component includes an active surface and an inactive surface. Electrically conductive columns (TSV) extend through the electronic component between the active surface and the inactive surface. A RDL structure is coupled to the inactive surface, the RDL structure redistributing the pattern of the electrically conductive columns at the inactive surface to a pattern of inactive surface RDL lands. The inactive surface RDL lands are exposed through via apertures of a package body. By using the inactive surface of the electronic component to distribute the inactive surface RDL lands, the allowable size of the electronic component is maximized.

Methods and structures for increasing the allowable die size in TMV packages

In one example, a semiconductor device includes a substrate with a top side, a bottom side, and a conductive structure. A first electronic component includes a first side, a second side, and first component terminals adjacent to the first side. The first component terminals face the substrate bottom side and are connected to the conductive structure. A second electronic component comprises a first side, a second side, and second component terminals adjacent to the second electronic component first side. The second electronic component second side is connected to the first electronic component second side so that the first component terminals and the second component terminals face opposite directions. Substrate interconnects are connected to the conductive structure, and a bottom encapsulant covers the substrate bottom side, the first electronic component, the second electronic component, and the substrate interconnects. Portions of the second component terminals and the substrate interconnects are exposed from a bottom side of the bottom encapsulant. Other examples and related methods are also disclosed herein.

Semiconductor package and fabricating method thereof

Semiconductor devices and methods of making semiconductor devices

Growing community of inventors

Tempe, AZ, United States of America

Roger D St Amand