International Business Machines Corporation

Robin A Susko

William Louis Brodsky

James A Busby

Bruce John Chamberlin

James Warren Wilson

Mitchell G Ferrill

Carol R Jones

James Robert Wilcox

Timothy Harrison Daubenspeck

Timothy Dooling Sullivan

Raschid Jose Bezama

Steven Lorenz Wright

Thomas Anthony Wassick

Krystyna Waleria Semkow

John Steven Kresge

Ian D Melville

Xiaojin Wei

Ekta Misra

George John Scott

Gary Lafontant

David Clifford Long

John M Lauffer

Frank Daniel Egitto

David L Questad

David L Edwards

Sushumna Iruvanti

Bernd Karl Appelt

Peter Jeffrey Brofman

Roy H Magnuson

Irving Memis

Madhav Datta

Thomas J Fleischman

Raymond Thomas Galasco

Andrew Michael Seman

Jennifer V Muncy

Ronald A Kaschak

Walter E Mlynko

Lawrence P Lehman

Robert D Topa

Scott Preston Moore

John R Susko

James Jens Hansen

Scott A Cummings

Joseph Hromek

Ronald S Horwath

Michael J Griffin, Iv

David K Balkin

Francis Emmi

Magan S Patel

Lawrence C Alexander

Structures and methods to reduce maximum current density in a solder ball are disclosed. A method includes forming a contact pad in a last wiring level and forming a plurality of wires of the contact pad extending from side edges of the contact pad to respective ones of a plurality of vias. Each one of the plurality of wires has substantially the same electrical resistance.

Structures and methods to reduce maximum current density in a solder ball

An LGA structure is provided having at least one semiconductor device over a substrate and a mechanical load apparatus over the semiconductor device. The structure includes a load-distributing material between the mechanical load apparatus and the substrate. Specifically, the load-distributing material is proximate a first side of the semiconductor device and a second side of the semiconductor device opposite the first side of the semiconductor device. Furthermore, the load-distributing material completely surrounds the semiconductor device and contacts the mechanical load apparatus, the substrate, and the semiconductor device. The load-distributing material can be thermally conductive and comprises an elastomer and/or a liquid. The load-distributing material comprises a LGA interposer adapted to connect the substrate to a PCB below the substrate and/or a second substrate. Moreover, the load-distributing material comprises compressible material layers and rigid material layers. The load-distributing material comprises a rigid material incased in a compressible material.

Sandwiched organic LGA structure

Methods, apparatus and assemblies for enhancing heat transfer in electronic components using a flexible thermal pillow. The flexible thermal pillow has a thermally conductive material sealed between top and bottom conductive layers, with the bottom layer having a flexible reservoir residing on opposing sides of a central portion of the pillow that has a gap. The pillow may have roughened internal surfaces to increase an internal surface area within the pillow for enhanced heat dissipation. In an electronic assembly, the central portion of the pillow resides between a heat sink and heat-generating component for the thermal coupling there-between. During thermal cycling, the flexible reservoir of the pillow expands to retain thermally conductive material extruded from the gap, and then contracts to force such extruded material back into the gap. An external pressure source may contact the pillow for further forcing the extruded thermally conductive material back into the gap.

Thermal pillow

A method and structure is disclosed for forming a removable interconnect for semiconductor packages, where the connector is adapted to repeatedly change from a first shape into a second shape upon being subjected to a temperature change and to repeatedly return to the first shape when not being subjected to the temperature change. The connector can be disconnected when the connector is in its second shape and the connector cannot be disconnected when the connector is in its first shape.

Temperature dependent semiconductor module connectors

Disclosed is a semiconductor package structure that incorporates the use of conductive pins to electrically and mechanically connect a semiconductor module and a substrate (e.g., printed wiring board). Specifically, one or both ends of the pins are hooked and are adapted to allow a press-fit connection with the walls of the plated through holes of either one or both of the semiconductor module and the substrate. The hook-shaped ends of the pins may have one or more hooks to establish the connection. Additionally, the pins may be formed of a temperature induced shape change material that bends to allow engaging and/or disengaging of the hook-shaped ends from the walls of the plated through holes.

Hook interconnect

CTE differentials between chips and organic dielectric carriers, boards or other substrates to which the chips are attached are accommodated with a layer of a thermoplastic material, preferably a thermotropic polymer whose physical properties can be altered by extrusion or other physical processes, such as liquid crystalline polyesters, that modifies the CTE of at least one component of the package and thereby reduces CTE differentials. The material may be applied to the entire surface of a chip carrier, printed circuit or other substrate, or form an interior layer of a multi-layered structure. It may also be applied to selected regions or areas on the surface of a carrier or other substrate where adjustment is required.

Methods and apparatus for balancing differences in thermal expansion in electronic packaging

A method of removing a metal skin from a through-hole surface of a copper-Invar-copper (CIC) laminate without causing differential etchback of the laminate. The metal skin includes debris deposited on the through-hole surface as the through hole is being formed by laser or mechanical drilling of a substrate that includes the laminate as an inner plane. Removing the metal skin combines electrochemical polishing (ECP) with ultrasonics. ECP dissolves the metal skin in an acid solution, while ultrasonics agitates and circulates the acid solution to sweep the metal skin out of the through hole. ECP is activated when a pulse power supply is turned on and generates a periodic voltage pulse from a pulse power supply whose positive terminal is coupled to the laminate and whose negative terminal is coupled to a conductive cathode. After the metal skin is removed, the laminate is differentially etched such that the copper is etched at a faster rate than the Invar. To prevent the differential etching, a copper layer is formed on a surface of the substrate with an electrical resistance R,between the copper layer and the positive terminal of the pulse power supply. Additionally, an electrical resistance R,is formed between the laminate and the positive terminal of the pulse power supply. Adjustment of R,and R,controls the relative etch rates of the copper and the Invar.

Removal of metal skin from a copper-Invar-copper laminate

CTE differentials between chips and organic dielectric carriers, boards or other substrates to which the chips are attached are accommodated with a layer of a thermoplastic material, preferably a thermotropic polymer whose physical properties can be altered by extrusion or other physical processes, such as liquid crystalline polyesters, that modifies the thermal expansion of at least one component of the package and thereby reduces CTE differentials. The material may be applied to the entire surface of a chip carrier, printed circuit or other substrate, or form an interior layer of a multi-layered structure. It may also be applied to selected regions or areas on the surface of a carrier or other substrate where adjustment is required.

Integrated circuit chip device having balanced thermal expansion

An assembly and process for connecting opposed semiconductor structures (12,14) comprising at least two structures. An interconnect (16) between the structures (12,14) connects the structures in opposed spaced relation to each other. The interconnect comprises a first material (18) and a second material (20). The first material comprises a resiliently flexible center portion. The second material comprises an electrically conductive outer portion surrounding the first material. The second material and the first material provide the interconnect with a flexibly compliant characteristic for maintaining an electrically conductive relationship between the structures.

Semiconductor structure interconnector and assembly

A flexible interconnect for flexibly connecting an integrated circuit chip to a substrate. The flexible interconnect includes a flexible core, formed of a polymeric material, fully covered by a layer of an electrically conductive metal. A layer of a compliant material is provided beneath the input/output pad of the substrate and/or integrated circuit chip to reduce mechanical stresses on the flexible interconnect. The substrate and integrated circuit chip may include depressions to receive ends of the flexible interconnect. In one embodiment, the flexible interconnect may be tubular in shape and positioned on a protrusion formed on the substrate.

Method and apparatus for flexibly connecting electronic devices

A silicon modified organic surface is roughened by treatment with an oxygen containing plasma. If necessary the organic surface may be silicon-modified by treatment with a silicon containing material prior to plasma treatment. The roughened organic surface provides improved adhesion to other organic surfaces and to deposited metals. Improvements in methods for laminating organic surfaces and for depositing metals on organic surfaces which achieve improved adhesion are disclosed. Structures comprising laminated organic layers or metal deposited on organic surfaces which provide improved adhesion between the organic layers or between the metal and the organic-surface are also disclosed.

Surface modification of organic materials to improve adhesion

Circuit boards or cards containing metallic layers on opposite major surfaces of a dielectric substrate whereby electrical and/or thermal interconnection between the metallic layers is provided in vias that extend through one of the metallic layers, and the dielectric substrate and into the other metallic layer.

Electrical and/or thermal interconnections and methods for obtaining such

A silicon-modified organic surface is roughened by treatment with an oxygen containing plasma. If necessary the organic surface may be silicon-modified by treatment with a silicon containing material prior to plasma treatment. The roughened organic surface provides improved adhesion to other organic surfaces and to deposited metals. Improvements in methods for laminating organic surfaces and for depositing metals on organic surfaces which achieve improved adhesion are disclosed. Structures comprising laminated organic layers of metal deposited on organic surfaces which provide improved adhesion between the organic layers or between the metal and the organic surface are also disclosed.

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Owego, NY, United States of America

Robin A Susko