United States of America As Represented by the Secretary of the Air Force

Mcdonnell Douglas Corporation

Robert W Herrick

Joseph L Levy

Danny J Krebs

A device and a method to minimize leakage current between adjacent sections of a semiconductor device, while minimizing topographic variations. The device has an etched shape of a diamond, with an unetched 'moat' in its center. While any type of etch will work, wet etching is usually used, both for its low cost and its good sidewell smoothness. Prior designs typically have a simple straight line (T-shape) across. The etching has general application to wafer fabrication of opto-electronic devices requiring good electrical isolation, and using self-aligned or planarization processing in later process step which require minimal topographic variations. More generally, the design technique can be applied to any etched semiconductor device where topographic variation needs to be minimized while using wet etching or other crystallographic etches. The novel features include the elimination of any lines along the 011 crystallographic axis (which give retrograde slopes in wet etching) and the use of an 'island-to-fill-in' feature, and minimize volume of absorbed resists.

Mask design

A scanning electron microscope is used to scan the etched facet edge to produce digital data representative of its profile. A Fourier transform of the edge profile is produced and the resulting plurality of spatial frequency components can be used to generate a first low frequency waveform component indicative of lack of precise edge definition, a midrange frequency component indicative of poor liftoff samples, and a high frequency component indicative of metal grain size. A tilt adjustment feature of the electron microscope is optionally used to advantageously magnify the shape of the profile in the y direction.

Method for measuring and analyzing surface roughness on semiconductor

A method for cleaving semiconductor devices along planes accurately positioned. Resist is applied to a major surface of the semiconductor device and a mask is projected upon the resist covered major surface. The mask is opaque in those regions in which no cleave is desired. Following the exposure of the resist, the removal of the mask and the development of the resist, an ion beam is positioned incident upon the semiconductor surface such that ion beam etching occurs in the areas in which no resist covers the semiconductor structure. Once a sufficient depth is etched in the areas not covered with resist such that the strength of the semiconductor structure in those areas is significantly less than in those areas covered by resist, the ion beam etching process is ended and the resist is stripped from the semiconductor structure. Subsequently, force is applied within the area in which the ion beam etching occurred to cleave the semiconductor structure within that region. Such cleaving may occur either prior or subsequent to etching of facets for the semiconductor devices.

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Hazelwood, MO, United States of America

Robert W Herrick