International Business Machines Corporation

Tel Epion Corporation

Robert Michael Geffken

Anthony K Stamper

William Thomas Motsiff

Edward Crandal Cooney, Iii

Ronald R Uttecht

David V Horak

Steven H Voldman

Robert K Leidy

John J Hautala

Matthew J Rutten

Kerry Bernstein

Arthur J Learn

Steven Robert Sherman

Paul M Feeney

Mark P Murray

Chung H Lam

Daniel C Edelstein

Arup Bhattacharyya

Paul A Farrar

Timothy Harrison Daubenspeck

Wilbur David Pricer

Vincent James McGahay

Rosemary A Previti-Kelly

Christy Sensenich Tyberg

David C Thomas

Adolf E Wirsing

Amanda L Piper

Elizabeth T Webster

Herbert Carl Cook

John Edward Cronin

John J Ellis-Monaghan

Stephen Ellinwood Luce

William Joseph Murphy

James Gardner Ryan

Howard Smith Landis

James M Harper

Stephen Arthur St Onge

Roger W Cheek

Carter W Kaanta

Jonathan Daniel Chapple-Sokol

Andrew J Watts

George A Dunbar, Iii

Bette L Bergman Reuter

Sally J Yankee

William H Guthrie

Prabhat Tiwari

Charles T Kroll

James M E Harper

Susan G Bombardier

Paul A Farrar, Sr

David H Yao

Paul Alden Farrar, Sr

Lawrence J Dunlop

Methods of forming capping structures on one or more different material surfaces are provided. One embodiment includes disposing a semiconductor structure in a reduced pressure chamber, forming a capping GCIB within the reduced pressure chamber, and directing the capping GCIB onto at least one of the one or more different material surfaces, so as to form at least one capping structure on the one or more surfaces onto which the capping GCIB is directed.

Method of forming capping structures on one or more material layer surfaces

Capping layer or layers on a surface of a copper interconnect wiring layer for use in interconnect structures for integrated circuits and methods and apparatus for forming improved integration interconnection structures for integrated circuits by the application of gas-cluster ion-beam processing. Reduced copper diffusion and improved electromigration lifetime result and the use of selective metal capping techniques and their attendant yield problems are avoided. Various cluster tool configurations including gas-cluster ion-beam processing modules for copper capping, cleaning, etching, and film formation steps are disclosed.

Copper interconnect wiring and method and apparatus for forming thereof

Methods for forming a dual damascene dielectric structure in a porous ultra-low-k (ULK) dielectric material by using gas-cluster ion-beam processing are disclosed. These methods minimize hard-mask layers during dual damascene ULK processing and eliminate hard-masks in the final ULK dual damascene structure. Methods for gas-cluster ion-beam etching, densification, pore sealing and ashing are described that allow simultaneous removal of material and densification of the ULK interfaces. A novel ULK dual damascene structure is disclosed with densified interfaces and no hard-masks.

Dual damascene integration structure and method for forming improved dual damascene integration structure

A method and structure for a single or dual damascene interconnect structure comprises forming wiring lines in a metallization layer over a substrate, shaping a laminated insulator stack above the metallization layer, patterning a hardmask over the laminated insulator stack, forming troughs in the hardmask, patterning the laminated insulator stack, forming vias in the patterned laminated insulator stack, creating sidewall spacers in the bottom portion of the vias, depositing an anti-reflective coating on the sidewall spacers, etching the troughs, removing the anti-reflective coating, depositing a metal layer in the troughs, vias, and sidewall spacers, and applying conductive material in the troughs and the vias. The laminated insulator stack comprises a dielectric layer further comprising oxide and polyarylene.

Metal spacer in single and dual damascene processing

A method and structure for a dual damascene interconnect structure comprises forming wiring lines in a metallization layer over a substrate, shaping a laminated insulator stack above the metallization layer, patterning a hardmask over the laminated insulator stack, forming troughs in the hardmask, creating sacrificial tungsten sidewall spacers in the troughs, patterning the laminated insulator stack, removing the sacrificial sidewall spacers, forming vias in the patterned laminated insulator stack, and depositing a metal liner and conductive material into the vias and troughs, wherein the laminated insulator stack comprises a dielectric layer further comprising oxide and polyarylene. The step of depositing prevents the laminated insulator stack from sputtering into the vias. Moreover, the step of depositing comprises cleaning the vias and troughs, optionally performing a reactive ion etching or argon sputter cleaning, depositing a plurality of metal layers over the vias and troughs, and depositing copper in the vias and troughs.

Sacrificial metal spacer damascene process

Metal spacer in single and dual damascence processing

An adjustable self aligned low capacitance integrated circuit air gap structure comprises a first interconnect adjacent a second interconnect on an interconnect level, spacers formed along adjacent sides of the first and second interconnects, and an air gap formed between the first and second interconnects. The air gap extends above an upper surface of at least one of the first and second interconnects and below a lower surface of at least one of the first and second interconnects, and the distance between the spacers defines the width of the air gap. The air gap is self-aligned to the adjacent sides of the first and second interconnects.

Adjustable self-aligned air gap dielectric for low capacitance wiring

Capping layer or layers on a surface of a copper interconnect wiring layer for use in interconnect structures for integrated circuits and methods of forming improved integration interconnection structures for integrated circuits by the application of gas-cluster ion-beam processing. Reduced copper diffusion and improved electromigration lifetime result and the use of selective metal capping techniques and their attendant yield problems are avoided.

Copper interconnect wiring and method of forming thereof

A method of reworking BEOL (back end of a processing line) metallization levels of damascene metallurgy comprises forming a plurality of BEOL metallization levels over a substrate, forming line and via portions in the BEOL metallization levels, selectively removing at least one of the BEOL metallization levels to expose the line and via portions, and replacing the removed BEOL metallization levels with at least one new BEOL metallization level, wherein the BEOL metallization levels comprise a first dielectric layer and a second dielectric layer, and wherein the first dielectric layer comprising a lower dielectric constant material than the second dielectric layer.

Single and multilevel rework

A method and structure for forming a metallic capping interface between damascene conductive wires/studs and damascene conductive wiring line structures. The method forms a first insulative layer on a substrate layer, followed by forming damascene conductive wires/studs in the first insulative layer. A lower portion of each damascene conductive wire/stud is in contact with an electronic device (e.g., a field effect transistor), or a shallow trench isolation, that is within the substrate layer. A top portion of the first insulative layer is removed, such as by etching, such that an upper portion of the damascene conductive wires/studs remain above the first insulative layer. A metallic capping layer is formed on the upper portions of the damascene conductive wires/studs such that the metallic capping layer is in conductive contact with the damascene conductive wires/studs. Portions of the metallic capping layer between the damascene conductive wires/studs are removed to form a metallic cap on each damascene conductive wire/stud and to conductively isolate one or more of the damascene conductive wires/studs. A portion of the metallic capping layer may be removed from a particular damascene conductive wire/stud such that no metallic capping material remains conductively coupled to the particular damascene conductive wire/stud. A second insulative layer is formed on the first insulative layer such that the second insulative layer covers the metallic caps. Damascene conductive wiring lines are formed within the second insulative layer above the metallic caps and are conductively coupled to the metallic caps.

Contact capping local interconnect

A structure and method of fabricating a semiconductor corrosion resistant metal fuse line including a refractory liner which can also act as a resistor is disclosed. Fabrication is accomplished using damascene process. The metal structure can be formed on a semiconductor substrate including a first portion including a first layer and a second layer, the first layer having higher resistivity than the second layer, the second layer having horizontal and vertical surfaces that are in contact with the first layer in the first portion, and a second portion coupled to the first portion, the second portion being comprised of the first layer, the first layer not being in contact with the horizontal and vertical surfaces of the second layer in the second portion. The metal structure can be used as a corrosion resistant fuse. The metal structure can also be used as a resistive element. The high voltage tolerant resistor structure allows for usage in mixed-voltage, and mixed signal and analog/digital applications. The resistor element has low capacitance, low skin effect, high linearity, a high melting temperature, and a high critical current to failure. The resistor structure can be formed on the walls of a dielectric trough. The structure can be applied to circuit applications such as an ESD network, an RC-coupled MOSFET, a resistor ballasted MOSFET and others. The resistors can be in series with the MOSFET or other structures.

Post-fuse blow corrosion prevention structure for copper fuses

Growing community of inventors

Burlington, VT, United States of America

Robert Michael Geffken