Teledyne Scientific and Imaging, LLC

Teledyne Licensing, LLC

Rockwell Scientific Licensing LLC

Robert L Borwick, Iii

Jeffrey DeNatale

Philip Stupar

Alexandros Papavasiliou

Chialun Tsai

Martin William Kendig

Robert Mihailovich

Yu-Hua Kao Lin

Viktor Tarashansky

Vivek Mehrotra

Rahul Ganguli

Jun Jason Yao

Jonathan Bruce Hacker

Robert J Anderson

John White

Ya-Chi Chen

Mark Field

Alex Papavasiliou

Les Warren

Chailun Tsai

Zhimin J Yao

Kathleen Garrett

Morgan Tench

Sangtae Park

Chris Hillman

Alan L Sailer

Jeffrey F DaNatale

A physics package apparatus for a compact atomic device includes a container having a plurality of slots and an open end, a first vapor cell carrier slidably seated in one of the plurality of slots, a vapor cell coupled to the first vapor cell carrier; and a lid sealably enclosing the open end so that the vapor cell is sealably enclosed in the container.

Physics package for compact atomic device

A magnetic field coil assembly includes a plurality of stacked dielectric layers, each of the plurality of stacked dielectric layers having a partial-loop conductive trace on a first side of the layer, a via interconnect in communication with the partial-loop conductive trace and extending from the first side of the layer to a side of the layer opposite from the first side, and a vapor cell reception aperture; and a vapor cell axially extending through the plurality of vapor cell reception apertures so that the plurality of partial-loop conductive traces is electrically connected serially to form a continuous coil disposed around the vapor cell that would create a magnetic field upon application of a current.

Integrated field coil for compact atomic devices

A micro-fabricated electromagnetic device is provided for on-circuit integration. The electromagnetic device includes a core. The core has a plurality of electrically insulating layers positioned alternatingly between a plurality of magnetic layers to collectively form a continuous laminate having alternating magnetic and electrically insulating layers. The electromagnetic device includes a coil embedded in openings of the semiconductor substrate. An insulating material is positioned in the cavity and between the coil and an inner surface of the core. A method of manufacturing the electromagnetic device includes providing a semiconductor substrate having openings formed therein. Windings of a coil are electroplated and embedded in the openings. The insulating material is coated on or around an exposed surface of the coil. Alternating magnetic layers and electrically insulating layers may be micro-fabricated and electroplated as a single and substantially continuous segment on or around the insulating material.

Micro-fabricated integrated coil and magnetic circuit and method of manufacturing thereof

A method of fabricating silicon waveguides with embedded active circuitry from silicon-on-insulator wafers utilizes photolithographic microfabrication techniques to define waveguide structures and embedded circuit recesses for receiving integrated circuitry. The method utilizes a double masking layer, one layer of which at least partially defines at least one waveguide and the other layer of which at least partially defines the at least one waveguide and at least one embedded circuit recess. The photolithographic microfabrication techniques are sufficiently precise for the required small structural features of high frequency waveguides and the double masking layer allows the method to be completed more efficiently. The basic fabrication method may be extended to provide batch arrays to mass produce silicon waveguide devices.

Method of fabricating silicon waveguides with embedded active circuitry

An apparatus includes a chip-scale atomic clock (CSAC) alkali vapor cell seated on a silicon substrate that is suspended in a package by a metalized Parylene strap having Parylene anchors embedded in a silicon frame, the Parylene strap comprising an extended rigidizing structure, and a plurality of electrical pins extending into an interior of the package, the plurality of electrical pins in electrical communication with the CSAC cell through the metalized Parylene strap, where the CSAC cell is mechanically connected to the package and thermally insulated from the package.

Micro-scale system to provide thermal isolation and electrical communication between substrates

Microfabricated inductors with through-wafer vias and including a first wafer and a second wafer, each wafer having a plurality of metal fillings therein, and a plurality of metal conductors connecting the plurality of metal fillings together to form a spiral. A method for producing an inductor including steps of forming a first plurality of vias in a first substrate, filling the first plurality of vias in the first substrate with a first plurality of metal fillings, forming a first plurality of metal conductors, connecting pairs of the first plurality of metal fillings together using the first plurality of metal conductors to form a spiral, performing the foregoing steps similarly on a second substrate formed with a second plurality of vias filled with a second plurality of metal fillings, and bonding the first substrate with the second substrate.

Microfabricated inductors with through-wafer vias

A method is disclosed for manufacturing a chip-scale optics module for an optical interrogator. The method includes aligning a polarization axis of a linear polarizer to an angle of 45 degrees from a fast axis of a quarter wave plate to enable circular polarization of a beam, when a beam is introduced to the linear polarizer, coupling the linear polarizer to the quarter wave plate after the aligning to form a circular polarizing filter sheet and then dicing the circular polarizing filter sheet to obtain a plurality of chip-scale circular polarizing filters. Each of the chip-scale circular polarizing filters is diced to have an edge that defines a polarization location index for the linear polarizer. A linear polarizer plate face of one of the chip-scale circular polarizing filters is then positioned so that the linear polarizer plate face is aligned with and parallel to an output face of a laser, whereby the polarization axis of the linear polarizer is not orthogonal to a polarization axis of the laser. The chip-scale circular polarizing filter is coupled to a frame after the positioning step.

Chip-scale optics module for optical interrogators

A waveguide component encapsulation device may include a housing having first and second surfaces, the housing defining a channel extending through the first and second surfaces, a micromachined waveguide component configured to be positioned in the channel, the waveguide component having first and second ends extending outside the channel and beyond the first and second surfaces of the housing by a finite length, and a pair of spacing members configured to align and stabilize the waveguide component within the channel.

Ruggedized waveguide encapsulation fixture for receiving a compressed waveguide component

A microscale apparatus includes a microscale rigidized Parylene strap having a reinforcement structure extending from a first side of the strap, a first silicon substrate suspended by the microscale rigidized Parylene strap, the microscale rigidized Parylene strap conformally coupled to the first substrate, and a second substrate conformally coupled to the microscale rigidized Parylene strap to suspend the first silicon substrate through the microscale rigidized Parylene strap.

A vapor cell includes an interrogation cell in a substrate, the interrogation cell having an entrance window and an exit window, and a first transparent thin-film heater in thermal communication with the entrance window. The transparent thin-film heater has a first layer in communication with a first pole contact at a proximal end of the heater and a layer coupler contact at a distal end, a second layer in communication with a second pole contact at the proximal end, and the second layer electrically coupled to the layer coupler contact at the distal end. An insulating layer is sandwiched between the first and second layers. The insulating layer has an opening at the distal end to admit the layer coupler contact and to insulate the remainder of the second layer from the first layer. The first and second pole contacts are available to complete an electric circuit at the proximal end, with magnetic fields for each of the first and second layers oriented in opposing directions when a current is applied through the circuit.

System for heating a vapor cell

A system is disclosed for charging a compact vapor cell, including placing an alkali-filled capillary into a reservoir cell formed in a substrate, the reservoir cell in vapor communication with an interrogation cell in the substrate and bonding a transparent window to the substrate on a common face of the reservoir cell and the interrogation cell to form a compact vapor cell. Capillary action in the capillary delays migration of alkali in the alkali-filled capillary from the reservoir cell into the interrogation cell during the bonding.

System for charging a vapor cell

An through-substrate via fabrication method requires forming a through-substrate via hole in a semiconductor substrate, depositing an electrically insulating, continuous and substantially conformal isolation material onto the substrate and interior walls of the via using ALD, depositing a conductive material into the via and over the isolation material using ALD such that it is electrically continuous across the length of the via hole, and depositing a polymer material over the conductive material such that any continuous top-to-bottom openings present in the via holes are filled by the polymer material. The basic fabrication method may be extended to provide vias with multiple conductive layers, such as coaxial and triaxial vias.

Through-substrate vias with polymer fill and method of fabricating same

A fabrication method which forms vertical capacitors in a substrate. The method is preferably an all-dry process, comprising forming a through-substrate via hole in the substrate, depositing a first conductive material layer into the via hole using atomic layer deposition (ALD) such that it is electrically continuous across the length of the via hole, depositing an electrically insulating, continuous and substantially conformal isolation material layer over the first conductive layer using ALD, and depositing a second conductive material layer over the isolation material layer using ALD such that it is electrically continuous across the length of the via hole. The layers are arranged such that they form a vertical capacitor. The present method may be successfully practiced at temperatures of less than 200&#xb0; C., thereby avoiding damage to circuitry residing on the substrate that might otherwise occur.

Method of fabricating vertical capacitors in through-substrate vias

A foldable microcircuit is initially a planar semiconductor wafer on which circuitry has been formed. The wafer is segmented into a plurality of tiles, and a plurality of hinge mechanisms are coupled between adjacent pairs of tiles such that the segmented wafer can be folded into a desired non-planar configuration having a high fill-factor and small gaps between tiles. The hinge mechanisms can comprise an organic material deposited on the wafer such that it provides mechanical coupling between adjacent tiles, with metal interconnections between tiles formed directly over the organic hinges, or routed between adjacent tiles via compliant bridges. Alternatively, the interconnection traces between tiles can serve as part or all of a hinge mechanism. The foldable microcircuit can be, for example, a CMOS circuit, with the segmented tiles folded to form, for example, a semi-spherical structure arranged to provide a wide FOV photodetector array.

Non-planar microcircuit structure and method of fabricating same

A microelectromechanical (MEM) device per the present invention comprises a semiconductor wafer&#x2014;typically an SOI wafer, a substrate, and a high temperature bond which bonds the wafer to the substrate to form a composite structure. Portions of the composite structure are patterned and etched to define stationary and movable MEM elements, with the movable elements being mechanically coupled to the stationary elements. The high temperature bond is preferably a mechanical bond, with the wafer and substrate having respective bonding pads which are aligned and mechanically connected to form a thermocompression bond to effect the bonding. A metallization layer is typically deposited on the composite structure and patterned to provide electrical interconnections for the device. The metallization layer preferably comprises a conductive refractory material such as platinum to withstand high temperature environments.

Growing community of inventors

Thousand Oaks, CA, United States of America

Robert L Borwick, Iii