Globalfoundries U.S. Inc.

Robert Katz

Toshiaki Kirihata

Darren Lane Anand

Dan Moy

Norman Whitelaw Robson

Faraz Khan

The present disclosure generally relates to semiconductor structures and, more particularly, to charge trap memory devices and methods of manufacture and operation. The semiconductor memory includes: a charge trap transistor comprising a gate structure, a source region and a drain region; and a self-heating circuit which selectively applies an alternating bias direction between the source region and the drain region of the charge trap transistor to provide an erase operation or a programming operation of the charge trap transistor.

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Hopewell Junction, NY, United States of America

Robert Katz