Siltronic Ag

Robert Hoelzl

Reinhold Wahlich

Andreas Huber

Wilfried Von Ammon

Theresia Bauer

Markus Blietz

Christoph Seuring

Semiconductor wafers with a diameter of at least 200 mm comprise a silicon carrier wafer, an electrically insulating layer and a semiconductor layer located thereon, the semiconductor wafer having been produced by means of a layer transfer process comprising at least one RTA step, wherein the semiconductor wafer has a warp of less than 30 &#x3bc;m, a DeltaWarp of less than 30 &#x3bc;m, a bow of less than 10 &#x3bc;m and a DeltaBow of less than 10 &#x3bc;m. Processes for the production of a semiconductor wafer of this type require specific heat treatment regimens.

Layered semiconductor wafer with low warp and bow, and process for producing it

A process for producing a single-crystal silicon wafer, comprises the following steps: is satisfied, where [Oi] is an oxygen concentration in the silicon wafer, [Oi](T) is a limit solubility of oxygen in silicon at a temperature T, &#x3c3;is the surface energy of silicon dioxide, &#x3a9; is a volume of a precipitated oxygen atom, r is a mean COP and k the Boltzmann constant, with the silicon wafer, during the heat treatment, at least part of the time being exposed to an oxygen-containing atmosphere.

Silicon wafer and process for producing it

Semiconductor wafers are leveled by position-dependent measurement of a wafer-characterizing parameter to determine the position-dependent value of this parameter over an entire surface of the semiconductor wafer, etching the entire surface of the semiconductor wafer simultaneously under the action of an etching medium with simultaneous illumination of the entire surface, the material-removal etching rate dependent on the light intensity at the surface of the semiconductor wafer, the light intensity being established in a position-dependent manner such that the differences in the position-dependent values of the parameter measured in step a) are reduced by the position-dependent material-removal rate. Semiconductor wafers with improved flatness and nanotopography, and SOI wafers with improved layer thickness homogeneity are produced by this process.

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Postmuenster, Germany

Robert Hoelzl