International Business Machines Corporation

Robert C Greenlese

Daniel C Edelstein

Bachir Dirahoui

Harris C Jones

Ryan Wayne Wuthrich

Robert J Sullivan

Christopher N Collins

Joseph P DeGeorge

Michael A Cohn

Alan Piciacchio

Teresa L Pinto

Kurt Elmer Bastian

Italo A DiNunzio

James J Burte

A semiconductor device having a planar integrated circuit interconnect and process of fabrication. The planar integrated circuit comprises a substrate having a first line wire formed in the substrate, a dielectric layer formed on the substrate, a second line wire formed in the dielectric layer, a contact via formed within the dielectric layer extending through the dielectric layer from the second line wire to the first line wire, and a dummy via which extends into the dielectric layer and is filled with a low dielectric material.

Process for making a planar integrated circuit interconnect

Planar integrated circuit interconnect

Camber of ceramic substrates is prevented by placing a conformable load tile over substrates during sintering. The conformable load tile has an initial curvature that facilitates escape of substrate binder gases during a burn out cycle. Subsequently, the conformable load tile conforms to the substrates under the higher heat of sintering temperature to maintain flatness of the substrates. To prevent sticking of the conformable load tile to the substrates, the conformable load tile is provided with a nonstick surface.

Weighted sintering process and conformable load tile

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Lagrangeville, NY, United States of America

Robert C Greenlese