Psemi Corporation

Peregrine Semiconductor Corporation

Applied Micro Circuits Corporation

Veo, Inc.

Robert Bernard Welstand

Mark L Burgener

Michael Andrew Stuber

George P Imthurn

Christopher Nelles Brindle

Dylan J Kelly

Clint L Kemerling

Alexander Dribinsky

Tae Youn Kim

Chen-Kuo Sun

Tae-Youn Kim

Rajat Sharma

Alper Genc

Chieh-Kai Yang

Jie Deng

Timothy L LeClair

Jeb M Binkley

A method and apparatus are disclosed for use in improving gate oxide reliability of semiconductor-on-insulator (SOI) metal-oxide-silicon field effect transistor (MOSFET) devices using accumulated charge control (ACC) techniques. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one embodiment, a circuit includes a MOSFET, operating in an accumulated charge regime, and means for controlling the accumulated charge. Determinations are made of effects of an uncontrolled accumulated charge and a controlled accumulated charge on time dependent dielectric breakdown (TDDB) of the gate oxide. The SOI MOSFET is adapted to have a selected average time-to-breakdown, responsive to the determinations, and the circuit is operated using techniques for ACC operatively coupled to the SOI MOSFET. In one embodiment, the ACC techniques include using an accumulated charge sink operatively coupled to the SOI MOSFET body.

Method and apparatus improving gate oxide reliability by controlling accumulated charge

A method and apparatus for use in improving the linearity characteristics of MOSFET devices using an accumulated charge sink (ACS) are disclosed. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one exemplary embodiment, a circuit having at least one SOI MOSFET is configured to operate in an accumulated charge regime. An accumulated charge sink, operatively coupled to the body of the SOI MOSFET, eliminates, removes or otherwise controls accumulated charge when the FET is operated in the accumulated charge regime, thereby reducing the nonlinearity of the parasitic off-state source-to-drain capacitance of the SOI MOSFET. In RF switch circuits implemented with the improved SOI MOSFET devices, harmonic and intermodulation distortion is reduced by removing or otherwise controlling the accumulated charge when the SOI MOSFET operates in an accumulated charge regime.

Method and apparatus for use in improving linearity of MOSFETs using an accumulated charge sink

A method and apparatus are disclosed for use in improving gate oxide reliability of semiconductor-on-insulator (SOI) metal-oxide-silicon field effect transistor (MOSFET) devices using accumulated charge control (ACC) techniques. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one embodiment, a circuit includes a MOSFET, operating in an accumulated charge regime, and means for controlling the accumulated charge, operatively coupled to the SOI MOSFET. A first determination is made of the effects of an uncontrolled accumulated charge on time dependent dielectric breakdown (TDDB) of the gate oxide of the SOI MOSFET. A second determination is made of the effects of a controlled accumulated charge on TDDB of the gate oxide of the SOI MOSFET. The SOI MOSFET is adapted to have a selected average time-to-breakdown, responsive to the first and second determinations, and the circuit is operated using techniques for accumulated charge control operatively coupled to the SOI MOSFET. In one embodiment, the accumulated charge control techniques include using an accumulated charge sink operatively coupled to the SOI MOSFET body.

A system for converting an optical signal into an electrical signal includes at least one differential Trans-Impedance Amplifier (TIA). To minimize (preferably eliminate) DC offset issues at the TIA output, an Input Counter-Offset (ICO) circuit is provided to remove the DC component of the initial optical signal from the input to the TIA. To further maximize the removal of DC offset at the TIA output, an Output Counter-Offset circuit is provided to take DC offset from the TIA output for use as a negative feedback directly to the input of the TIA. Modifications of the present invention are also intended for use with two TIA terminations and with a travelling wave photodiode.

Differential trans-impedance amplifier receiver using counter-offset circuitry

A method and apparatus are disclosed for use in improving the gate oxide reliability of semiconductor-on-insulator (SOI) metal-oxide-silicon field effect transistor (MOSFET) devices using accumulated charge control (ACC) techniques. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one embodiment, a circuit comprises a MOSFET, operating in an accumulated charge regime, and means for controlling the accumulated charge, operatively coupled to the SOI MOSFET. A first determination is made of the effects of an uncontrolled accumulated charge on time dependent dielectric breakdown (TDDB) of the gate oxide of the SOI MOSFET. A second determination is made of the effects of a controlled accumulated charge on TDDB of the gate oxide of the SOI MOSFET. The SOI MOSFET is adapted to have a selected average time-to-breakdown, responsive to the first and second determinations, and the circuit is operated using techniques for accumulated charge control operatively coupled to the SOI MOSFET. In one embodiment, the accumulated charge control techniques include using an accumulated charge sink operatively coupled to the SOI MOSFET body.

Method and apparatus for use in improving linearity of MOSFETS using an accumulated charge sink

A method and apparatus are disclosed for use in improving the gate oxide reliability of semiconductor-on-insulator (SOD metal-oxide-silicon field effect transistor (MOSFET) devices using accumulated charge control (ACC) techniques. The method and apparatus are adapted to remove, reduce, or otherwise control accumulated charge in SOI MOSFETs, thereby yielding improvements in FET performance characteristics. In one embodiment, a circuit comprises a MOSFET, operating in an accumulated charge regime, and means for controlling the accumulated charge, operatively coupled to the SOI MOSFET. A first determination is made of the effects of an uncontrolled accumulated charge on time dependent dielectric breakdown (TDDB) of the gate oxide of the SOI MOSFET. A second determination is made of the effects of a controlled accumulated charge on TDDB of the gate oxide of the SOI MOSFET. The SOI MOSFET is adapted to have a selected average time-to-breakdown, responsive to the first and second determinations, and the circuit is operated using techniques for accumulated charge control operatively coupled to the SOI MOSFET. In one embodiment, the accumulated charge control techniques include using an accumulated charge sink operatively coupled to the SOI MOSFET body.

An EO phase shifter for modulating an electrical signal onto an optical wave is manufactured using CMOS process tools whereby a waveguide core made of EO material has intimate contacts with its electrodes. Specifically, the waveguide core is made of a Silicon-Rich Silicon Nitride (SRN) material which has a high linear refractive index n and a high third order nonlinear susceptibility. The electrodes are made of P or N doped silicon. Also, polarization of the optical wave is oriented normal to interfaces between the waveguide core and the electrodes. With this combination, the EO phase shifter exhibits high optical confinement, low propagation loss, and a high electro-optic overlap integral for modulation.

Dielectric electro-optic phase shifter

In accordance with the present invention, an elongated phase shifting diode is provided for modulating an electrical signal onto an optical wave. Structurally, the phase shifting diode includes a p doped central stripe that extends through a phase shifting length L of a waveguide. Pdoped finger stripes and Ndoped finger stripes, which are laterally and axially offset from each other, extend into the waveguide for contact with the p doped central stripe along the length L. In combination, the plurality of Ndoped finger stripes and the p doped central stripe create a plurality of PN junctions that are structurally aligned along the p doped central stripe to establish electrically parallel phase shifting functions for the elongated diode.

Optical phase shifter using fine lithography defined volumetric junctions

A method and apparatus for use in improving linearity sensitivity of MOSFET devices having an accumulated charge sink (ACS) are disclosed. The method and apparatus are adapted to address degradation in second- and third-order intermodulation harmonic distortion at a desired range of operating voltage in devices employing an accumulated charge sink.

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San Diego, CA, United States of America

Robert Bernard Welstand