Infineon Technologies Ag

Robert Bauer

Bernd Goller

Heinrich Koerner

Peter Ossimitz

Wolfgang Stadler

Oliver Nagler

Sergey Ananiev

Tobias Jacobs

Yik Yee Tan

Werner Ertle

Juergen Walter

Till Frohnmüller

Reinhard Greiderer

Olaf Schmeckebier

A semiconductor device includes an electrically conductive contact pad structure. Moreover, the semiconductor device includes a bond structure. The bond structure is in contact with the electrically conductive contact pad structure at least at an enclosed interface region. Additionally, the semiconductor device includes a degradation prevention structure laterally surrounding the enclosed interface region. The degradation prevention structure is vertically located between a portion of the bond structure and a portion of the electrically conductive contact pad structure.

Semiconductor devices and methods for forming a semiconductor device

A chip arrangement may include: a chip including a plurality of electrical nets, wherein each electrical net includes at least one bonding pad; and a plurality of pillars formed on the at least one bonding pad of a majority of the plurality of electrical nets, wherein the plurality of pillars may be configured to connect the at least one bonding pad of the majority of the plurality of electrical nets to a chip-external connection region.

Chip arrangement, and method for forming a chip arrangement

An integrated semiconductor structure has a substrate, a semiconductor element located on the substrate, a pad metal, metal layers located between the pad metal and the substrate, and insulation layers that separate the metal layers from one another. The pad metal extends over at least&#x2014;part of the semiconductor element. Below the surface of the pad metal, at least the top two metal layers include two or more adjacent interconnects.

Semiconductor structure integrated under a pad

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Moosach, Germany

Robert Bauer