Intel Corporation

Richard Christopher Stamey

Robert L Sankman

Robert Starkston

Scott M Mokler

Amruthavalli Pallavi Alur

Kevin E Wells

Min Suet Lim

Eng Huat Goh

Jiun Hann Sir

Jimin Yao

Robert Fite

Brian S Jarrett

Shankar Krishnan

Gautam Nath

Alfredo Cueva Gonzalez

Jeffrey Colwell

Juan Ramirez Aguilar

Chu Aun Lim

Geoffrey G Von Allmen

Miguel Cervantes Lopez

Arturo Sanchez Hernandez

Georges Faure Vaquero

A semiconductor package is disclosed, which comprises a substrate, one or more dies on a first side of the substrate, and a plurality of interconnect structures having a first pitch and coupled to a second side of the substrate. The interconnect structures may attach the substrate to a board. The substrate may include a first interconnect layer having a second pitch. The first interconnect layer may be coupled to the one or more dies through second one or more interconnect layers. Third one or more interconnect layers between the first interconnect layer and the interconnect structures may translate the first pitch to the second pitch. The substrate may include a recess on a section of the second side of the substrate. The semiconductor package may further include one or more components within the recess and attached to the second side of the substrate.

Multi-use package architecture

Hybrid microelectronic substrates, and related devices and methods, are disclosed herein. In some embodiments, a hybrid microelectronic substrate may include a low-density microelectronic substrate having a recess at a first surface, and a high-density microelectronic substrate disposed in the recess and coupled to a bottom of the recess via solder.

Hybrid microelectronic substrates

A hybrid microelectronic substrate may be formed by the incorporation of a high density microelectronic patch substrate within a lower density microelectronic substrate. The hybrid microelectronic substrate may allow for direct flip chip attachment of a microelectronic device having high density interconnections to the high density microelectronic patch substrate portion of the hybrid microelectronic substrate, while allowing for lower density interconnection and electrical routes in areas where high density interconnections are not required.

Hybrid microelectronic substrate and methods for fabricating the same

Modular printed circuit board (PCB) structures and methods of producing them are described herein. In some embodiments, a PCB structure may include a first PCB module including first structures on one or more layers of the first PCB module. The PCB structure may further include a second PCB module including second structures on one or more layers of the second PCB module. The PCB structure may additionally include a middle layer between the first PCB module and the second PCB module. The middle layer electrically coupling, without connectors, one or more of the first structures aligned with one or more of the second structures.

Modular printed circuit board electrical integrity and uses

Described are apparatuses for modular printed circuit boards (PCB) and methods for producing modular PCBs. An apparatus may include a first PCB module with a first pattern of routing structures on one or more layers of the first PCB module. The apparatus may further include a second PCB module with a second pattern of routing structures on one or more layers of the second PCB module. The second pattern of routing structures may be aligned with and electrically coupled to the first pattern of routing structures without connectors. Other embodiments may be described and/or claimed.

Modular printed circuit board

Apparatuses, methods and storage media associated with cooling one or more heat-generating components of an electronic device are disclosed herein. In embodiments, an electronic device may include a tank that may include a dielectric fluid and one or more heat-generating components. The electronic device may further include one or more transducers coupled with the tank. The transducers may be configured to generate an ultrasonic wave that controls movement of the dielectric fluid at a location within the tank. Other embodiments may be described and/or claimed.

Ultrasound assisted immersion cooling

The present disclosure is generally related to power management in a circuit on a circuit board of a processor. The circuit includes a first power connector coupled to a first power input rail. The circuit includes a second power connector and a second power input rail. The circuit includes a control module. The control module is configured to determine a power specification of the circuit board. The control module is configured to detect a power cable connected to the first control connector. The control module is configured to sense a voltage at the second power connector. The control module is configured to couple the second power input rail with the first power connector or the second power connector in response to the determined power specification of the circuit board and the sensed voltage at the second power connector.

Power management in a circuit

Growing community of inventors

Portland, OR, United States of America

Richard Christopher Stamey