Intel Corporation

Ravindra V Tanikella

Nachiket R Raravikar

Rahul N Manepalli

Charan K Gurumurthy

Mengzhi Pang

Christopher J Bahr

Suddhasattwa Nad

Darko Grujicic

Marcel Arlan Wall

Rengarajan Shanmugam

Roy Dittler

Sandeep Gaan

Chandramouleeswaran Subramani

Adrian Bayraktaroglu

Ke Liu

Embodiments of the present disclosure describe techniques for providing an apparatus with a substrate provided with plasma treatment. In some instances, the apparatus may include a substrate with a surface that comprises a metal layer to provide signal routing in the apparatus. The metal layer may be provided in response to a plasma treatment of the surface with a functional group containing a gas (e.g., nitrogen-based gas), to provide absorption of a transition metal catalyst into the surface, and subsequent electroless plating of the surface with a metal. The transition metal catalyst is to enhance electroless plating of the surface with the metal. Other embodiments may be described and/or claimed.

Apparatus with a substrate provided with plasma treatment

Highly reliable interconnections for microelectronic packaging. In one embodiment, dielectric layers in a build-up interconnect have a gradation in glass transition temperature; and the later applied dielectric layers are laminated at temperatures lower than the glass transition temperatures of the earlier applied dielectric layers. In one embodiment, the glass transition temperatures of earlier applied dielectric films in a build-up interconnect are increased through a thermosetting process to exceed the temperature for laminating the later applied dielectric films. In one embodiment, a polyimide material is formed with embedded catalysts to promote cross-linking after a film of the polyimide material is laminated (e.g., through photo-chemical or thermal degradation of the encapsulant of the catalysts). In one embodiment, the solder resist opening walls have a wettable layer generated through laser assisted seeding so that there is no gap between the solder resist opening walls and no underfill in the solder resist opening.

Semiconductor device having polyimide layer

Materials, structures and methods for microelectronic packaging

A microelectronic structure may include an interconnect structure, an amine functional reactive polymer layer grafted onto the interconnect structure, and a dielectric layer on the amine functional reactive polymer layer, wherein the dielectric layer is bonded to the polymer layer with an amine bond. In one embodiment, the interconnect structure may be fabricated from a copper containing material. In a further embodiment, the dielectric layer may comprise an oxygen functional reactive dielectric layer, such as an epoxy dielectric layer. In one method of fabricating the microelectronic structure, the amine functional reactive polymer layer may be grafted onto the interconnect structure by an initiated chemical vapor deposition process.

Polymer grafting for enhanced dielectric and interconnect material adhesion

A composite material including an arrangement of approximately aligned nanofilaments overlying at least another arrangement of approximately aligned nanofilaments, the longitudinal axis of the nanotubes of the first arrangement being approximately perpendicular to the longitudinal axis of the nanotubes of the other arrangement, and the arrangements forming at least one array. A resin material having nanoparticles dispersed throughout is disposed among the array(s) of nanofilaments, and cured, and openings may be formed into or through the composite material corresponding to spaces provided in the array of nanofilaments. A composite material according to embodiments forms a microelectronic substrate or some portion thereof, such as a substrate core.

Aligned nanotube bearing composite material

A die-attach composition includes a resin such as a thermosetting resin, a hardener, and a low molecular weight oligomer diluent. A die-attach composition includes a polyimide in a major amount and a resin such as a thermosetting resin in a minor amount. The die-attach composition also includes a reactive polymer diluent. Combinations of the low molecular weight oligomer diluent and the reactive polymer diluent are included. The die-attach composition is applied to surface mount technology such as wire-bond dice. A computing system is also included that uses the die-attach composition.

Die-attach films for chip-scale packaging, packages made therewith, and methods of assembling same

According to some embodiments, a method, apparatus, and system are provided. In some embodiments, the method includes providing solder resist material on a surface of a substrate, applying mask material on top of the solder resist material, reflowing solder located in an opening formed through both the solder resist material and the mask material, and removing the mask material after the reflowing of the solder.

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Phoenix, AZ, United States of America

Ravindra V Tanikella