Intel Corporation

Ravi V Mahajan

Robert Starkston

John Stephen Guzek

Chia-Pin Chiu

Debendra Mallik

Deepak Kulkarni

Gregory Martin Chrysler

Ravi S Prasher

Chuan Hu

Ioan Sauciuc

Charles A Gealer

George F Raiser

Johanna M Swan

Suresh Ramalingam

Alan M Myers

Sarah E Kim

R Scott List

James G Maveety

Nagesh K Vodrahalli

Quat T Vu

Sandeep B Sane

Gilroy J Vandentop

Michael L Rutigliano

John F McMahon

Mun Leong Loke

Mirng-Ji Lii

Raymond A Krick

Neil C Delaplane

Bob Sundahl

Michael J Costello

Edmond L Hart

John A Rabenius

Scot W Taylor

Farukh Fares

Adel A Elsherbini

Shawna M Liff

Telesphor Kamgaing

Feras Eid

Robert L Sankman

Sasha N Oster

Kemal Aygun

Omkar G Karhade

Nitin A Deshpande

Harry G Skinner

James Chris Matayabas, Jr

Hong Xie

Gregory Alan James

Oswald L Skeete

Bala Natarajan

Timothy E McIntosh

Ron Edsall

Brad Menzies

Embodiments of a system and methods for localized high density substrate routing are generally described herein. In one or more embodiments an apparatus includes a medium, first and second circuitry elements, an interconnect element, and a dielectric layer. The medium can include low density routing therein. The interconnect element can be embedded in the medium, and can include a plurality of electrically conductive members therein, the electrically conductive member can be electrically coupled to the first circuitry element and the second circuitry element. The interconnect element can include high density routing therein. The dielectric layer can be over the interconnect die, the dielectric layer including the first and second circuitry elements passing therethrough.

Localized high density substrate routing

An electronic assembly that includes a first electronic device. The first electronic device includes a cavity that extends into a back side of the first electronic device. The electronic assembly further includes a second electronic device. The second electronic device is mounted to the first electronic device within the cavity in the first electronic device. In some example forms of the electronic assembly, the first electronic device and the second electronic device are each a die. It should be noted that other forms of the electronic assembly are contemplated where only one of the first electronic device and the second electronic device is a die. In some forms of the electronic assembly, the second electronic device is soldered to the first electronic device.

Electronic assembly that includes stacked electronic devices

In some embodiments, integrated circuit packages including high density bump-less build up layers and a lesser density core or coreless substrate are presented. In this regard, an apparatus is introduced having a first element including a microelectronic die having an active surface and at least one side, an encapsulation material adjacent said at least one microelectronic die side, wherein said encapsulation material includes at least one surface substantially planar to said microelectronic die active surface, a first dielectric material layer disposed on at least a portion of said microelectronic die active surface and said encapsulation material surface, a plurality of build-up layers disposed on said first dielectric material layer, and a plurality of conductive traces disposed on said first dielectric material layer and said build-up layers and in electrical contact with said microelectronic die active surface; and a second element coupled to the first element, the second element including a substrate having a plurality of dielectric material layers and conductive traces to conductively couple conductive contacts on a top surface with conductive contacts on a bottom surface, said conductive contacts on said top surface conductively coupled with said conductive traces of said first element. Other embodiments are also disclosed and claimed.

Integrated circuit packages including high density bump-less build up layers and a lesser density core or coreless substrate

This disclosure relates generally to devices, systems, and methods for making a flexible microelectronic assembly. In an example, a polymer is molded over a microelectronic component, the polymer mold assuming a substantially rigid state following the molding. A routing layer is formed with respect to the microelectronic component and the polymer mold, the routing layer including traces electrically coupled to the microelectronic component. An input is applied to the polymer mold, the polymer mold transitioning from the substantially rigid state to a substantially flexible state upon application of the input.

Flexible electronic assembly method

The present invention involves a method of providing an integrated circuit package having a substrate with a vent opening. The integrated circuit package includes a substrate having an opening and an integrated circuit mounted to the substrate. An underfill material is dispensed between the substrate and the integrated circuit.

Process for assembling an integrated circuit package having a substrate vent hole

A microelectronic package comprises a substrate (), a silicon patch () embedded in the substrate, a first interconnect structure () at a first location of the silicon patch and a second interconnect structure () at a second location of the silicon patch, and an electrically conductive line () in the silicon patch connecting the first interconnect structure and the second interconnect structure to each other.

Microelectronic package containing silicon connecting region for high density interconnects, and method of manufacturing same

Microelectronic package containing silicon patches for high density interconnects, and method of manufacturing same

To accommodate high power densities associated with high-performance integrated circuits, an integrated circuit (IC) package includes a heat-dissipating structure in which heat is dissipated from a surface of one or more dice to a heat spreader. The heat spreader has a fluid-conducting channel formed therein, and a fluid coolant may be circulated through the channel via a micropump. In an embodiment, the channel is located at or near a surface of the heat spreader, and a heat-generating IC is in thermal contact with the heat spreader. In an embodiment, the IC is a thinned die that is coupled to the heat spreader via a thinned thermal interface material. Methods of fabrication, as well as application of the package to an electronic assembly and to an electronic system, are also described.

Method of forming electronic package having fluid-conducting channel

A microelectronic package comprises a substrate (), a die () supported by the substrate, an interconnect feature () connecting the die and the substrate to each other, and a thermoelectric cooler () adjacent to the interconnect feature.

Microelectronic package and method of cooling an interconnect feature in same

The present invention discloses a method of confining a liquid metal alloy within a closed-loop system; distributing a first portion of the liquid metal alloy in a cavity within the closed-loop system; turning on an electromagnet to generate a magnetic field to permeate flexible sidewalls of the cavity; attracting the liquid metal alloy in the cavity towards the electromagnet to expand the flexible sidewalls; inducing a second portion of the liquid metal alloy to enter the cavity from an inlet end of a pipe within the closed-loop system; turning off the electromagnet; repelling the liquid metal alloy in the cavity away from the electromagnet to contract the flexible sidewalls; and inducing a third portion of the liquid metal alloy to exit the cavity to an outlet end of the pipe.

Electromagnetically-actuated micropump for liquid metal alloy

Growing community of inventors

Tempe, AZ, United States of America

Ravi V Mahajan