Freescale Semiconductor,inc.

Randy W Cotton

Olubunmi O Adetutu

Dharmesh Jawarani

Dina H Triyoso

A semiconductor process and apparatus provide a polysilicon structure () and source/drain regions () formed adjacent thereto in which a dual silicide scheme is used to form first silicide regions in the polysilicon, source and drain regions () using a first metal (e.g., cobalt). After forming sidewall spacers (), a second metal (e.g., nickel) is used to form second silicide regions in the polysilicon, source and drain regions () to reduce encroachment by the second silicide in the source/drain () and to reduce resistance in the polysilicon structure caused by agglomeration and voiding from the first silicide ().

Dual metal silicide scheme using a dual spacer process

A method for forming a semiconductor device () creates a dielectric layer () with high dielectric constant. An interfacial layer () is formed over a semiconductor substrate (). A dielectric layer () is formed over the interfacial layer, wherein the dielectric layer has a high dielectric constant (K). The dielectric layer is thinned, such as by etching or chemical mechanical polishing, wherein a thickness of the thinned dielectric layer is less than a thickness of the dielectric layer prior to thinning. In one form, the method is used to form a transistor having a gate electrode layer formed over the thinned dielectric layer and source/drain diffusions () within the semiconductor substrate.

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Pflugerville, TX, United States of America

Randy W Cotton