Semiconductor Components Industries, LLC

Ralph N Wall

Meng-Chia Lee

Yupeng Chen

Gordon M Grivna

Mingjiao Liu

Umesh Sharma

Shamsul Arefin Khan

Harry Yue Gee

Mark Griswold

David D Marreiro

Derrick Johnson

Phillip Holland

Rong Liu

Raymond Lappan

In an example, a semiconductor device includes a semiconductor substrate of a first conductivity type and a semiconductor region of the first conductivity type over the semiconductor substrate. A well region of a second conductivity type is in the semiconductor region. A doped region of the first conductivity type is in the well region. A doped region of the second conductivity type is in the well region. A doped region of the second conductivity type is in the semiconductor substrate at a bottom side. A doped region of the first conductivity type is in the semiconductor substrate at the bottom side. A first conductor is at a top side of the semiconductor region and a second conductor is at the bottom side. In some examples, one or more of doped regions at the bottom side is a patterned doped region.

Semiconductor devices and methods of manufacturing semiconductor devices

In an aspect, a process of forming an electronic device can include patterning a substrate to define a trench having a sidewall and forming a first semiconductor layer within the trench and along the sidewall. In an embodiment, the process can further include forming a barrier layer within the trench after forming the first semiconductor layer; forming a second semiconductor layer within the trench after forming the barrier layer, wherein within the trench, first and second portions of the second semiconductor layer contact each other adjacent to a vertical centerline of the trench; and exposing the second semiconductor layer to radiation sufficient to allow a void within second semiconductor layer to migrate toward the barrier layer. In another embodiment, after forming a semiconductor within the trench, the process can further include forming an insulating layer that substantially fills a remaining portion of the trench.

Electronic device including a semiconductor layer within a trench and a semiconductor layer and a process of forming the same

In a general aspect, method of producing an insulated-gate bipolar transistor (IGBT) device can include forming a termination structure in an inactive region. The inactive region at least partial surround an active region. The method can also include forming a trench extending along a longitudinal axis in the active region. A first mesa can define a first sidewall of the trench, and a second mesa can define a second sidewall of the trench. The first mesa and the second mesa can be parallel with the trench. The method can further include forming, in at least a portion of the first mesa, an active segment of the IGBT device, and, forming, in at least a portion of the second mesa, an inactive segment of the IGBT device.

Methods of manufacture for trench-gate insulated-gate bipolar transistors (IGBTs)

In a general aspect, an insulated gate bipolar transistor (IGBT) device can include an active region, an inactive region and a trench extending along a longitudinal axis in the active region. The IGBT device can also include a first mesa defined by a first sidewall of the trench and in parallel with the trench and a second mesa defined by a second sidewall of the trench and in parallel with the trench. The first mesa can include at least one active segment of the IGBT device and the second mesa can include at least one inactive segment of the IGBT device.

Trench-gate insulated-gate bipolar transistors

In a general aspect, an insulated gate bipolar transistor (IGBT) device can include an active region, an inactive region and a trench extending along a longitudinal axis in the active region. The IGBT can also include a first mesa defining a first sidewall of the trench and in parallel with the trench and a second mesa defining a second sidewall of the trench and in parallel with the trench. At least a portion of the first mesa can include an active segment of the IGBT device, and at least a portion of the second mesa can include an inactive segment of the IGBT device.

Trench-gate insulated-gate bipolar transistors (IGBTs)

An electronic device can include a semiconductor substrate having a front side and a back side; an emitter region closer to the front side than to the back side; a trench extending from a back side surface into the semiconductor substrate, wherein the trench has a sidewall and a bottom; a collector region along the back side surface and spaced apart from the bottom of the trench; a field-stop region lying along the bottom and at least a portion of the sidewall of the trench, wherein the emitter and field-stop regions have one conductivity type, and the collector region has the opposite conductivity type; and a collector terminal along the back side and including a metal-containing material, wherein the collector terminal contacts the collector region and is isolated from the field-stop region. A process of forming the electronic device does not require complex or marginal processing operations.

Electronic device including an insulated gate bipolar transistor having a field-stop region and a process of forming the same

Systems and methods herein are directed towards semiconductor devices and methods of manufacture thereof, including the formation of a plurality of passive trenches that act as a single passive trench and may be connected to gate electrodes and/or emitters in various embodiments.

Accumulation enhanced insulated gate bipolar transistor (AEGT) and methods of use thereof

A semiconductor device having a novel buried junction architecture. The semiconductor device may have three terminals and a drift region between two of the terminals. The drift region includes an upper drift layer, a lower drift layer, and a buried junction layer between the upper and lower drift layers, wherein the upper and lower drift layers have a first type of doping. The buried junction layer comprises an interspersed pattern of a first material and a second material, the first material having a second type of doping opposite the first type of doping and the second material having the first type of doping and having a different doping concentration than the upper and lower drift layers.

Semiconductor device with a buried junction layer having an interspersed pattern of doped and counter-doped materials

In one embodiment, an ESD device is configured to include a trigger device that assists in forming a trigger of the ESD device. The trigger device is configured to enable a transistor or a transistor of an SCR responsively to an input voltage having a value that is no less than the trigger value of the ESD device.

ESD device and structure therefor

Method of forming an ESD device and structure therefor

In accordance with an embodiment, a semiconductor component includes a common mode filter monolithically integrated with a protection device. The common mode filter may be composed of first, second, third, and fourth coils, wherein each coil has first and second terminals and the first coil is magnetically coupled to the second coil and the third coil is magnetically coupled to the fourth coil. The protection device has a first terminal coupled to the first terminal of the first coil and a second terminal coupled to the first terminal of the third coil. An energy storage element has a terminal coupled to the second and first terminals of the first and second coils, respectively. Another embodiment includes monolithically integrating a common mode filter with a protection device and monolithically integrating a metal-insulator-metal capacitor with the common mode filter.

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Pocatello, ID, United States of America

Ralph N Wall