Lam Research Corporation

Applied Materials, Inc.

Law Research Corporation

Rajinder Dhindsa

Alexei Marakhtanov

James Rogers

Olivier Luere

Leonid Dorf

Eric A Hudson

Eric H Lenz

Sunil Srinivasan

Andrew D Bailey, Iii

Lumin Li

Anthony De La Llera

Sang Ki Nam

Andreas Fischer

Michael C Kellogg

Evgeny Kamenetskiy

Felix Leib Kozakevich

Mukund Srinivasan

Denis M Koosau

Daniel Sang Byun

Linying Cui

Olivier Joubert

Ryan Bise

Anurag Kumar Mishra

Kartik Ramaswamy

Philip Allan Kraus

Valentin Nikolov Todorow

Yue Guo

Luc Albarede

Reza Sadjadi

Travis Koh

Keith Laurence Comendant

Fangli J Hao

Gerardo Delgadino

Yen-Kun Victor Wang

Sumanth Banda

Saurabh J Ullal

Jason Augustino

Babak Kadkhodayan

Allan Kent Ronne

Jaehyun Kim

William M Denty, Jr

Harmeet Singh

Akira Koshiishi

Douglas L Keil

Richard Alan Gottscho

Henry Povolny

Steven E Babayan

Andreas Schmid

Jason Andrew Kenney

David Trussell

Zhisong Huang

Tom Stevenson

Michael Robert Rice

Mirzafer K Abatchev

Neil M Benjamin

Timothy Joseph Franklin

Kenji Takeshita

Stephen Donald Prouty

Vedapuram S Achutharaman

Aaron Eppler

Camelia Rusu

Ben-Li Sheu

Darrell Ehrlich

Jerrel Kent Antolik

Alvaro Garcia De Gorordo

Ji Soo Kim

Carlaton Wong

Sathyendra Ghantasala

Vinay Pohray

Peter Muraoka

Scott Stevenot

Shahid Rauf

Jeffrey S Marks

Ankur Agarwal

Vahid Firouzdor

Yogananda Sarode Vishwanath

Anwar Husain

Imad Yousif

S M Reza Sadjadi

Sean S Kang

Michael D Willwerth

Ajit Balakrishna

Eric A Pape

Duane Outka

Jon McChesney

Seyed Jafar Jafarian-Tehrani

Phillip A Criminale

Leonard Michael Tedeschi

Yaoling Pan

Patrick John Tae

Ching-Hwa Chen

Jaeyong Cho

Xue Chang

Jean-Paul Booth

Changhun Lee

Jonathan Sungehul Kim

Akhil Mehrotra

Russell Martin

Hailong Zhou

Pratik Mankidy

Embodiments herein provide plasma processing chambers and methods configured for fine-tuning and control over a plasma sheath formed during the plasma-assisted processing of a semiconductor substrate. Embodiments include a sheath tuning scheme, including plasma processing chambers and methods, which can be used to tailor one or more characteristics of a plasma sheath formed between a bulk plasma and a substrate surface. Generally, the sheath tuning scheme provides differently configured pulsed voltage (PV) waveforms to a plurality of bias electrodes embedded beneath the surface of a substrate support in an arrangement where each of the electrodes can be used to differentially bias a surface region of a substrate positioned on the support. The sheath tuning scheme disclosed herein can thus be used to adjust and/or control the directionality, and energy and angular distributions of ions that bombard a substrate surface during a plasma-assisted etch process.

Plasma processing chambers configured for tunable substrate and edge sheath control

Systems and methods for controlling a voltage waveform at a substrate during plasma processing include applying a shaped pulse bias waveform to a substrate support, the substrate support including an electrostatic chuck, a chucking pole, a substrate support surface and an electrode separated from the substrate support surface by a layer of dielectric material. The systems and methods further include capturing a voltage representative of a voltage at a substrate positioned on the substrate support surface and iteratively adjusting the shaped pulse bias waveform based on the captured signal. In a plasma processing system a thickness and a composition of a layer of dielectric material separating the electrode and the substrate support surface can be selected such that a capacitance between the electrode and the substrate support surface is at least an order of magnitude greater than a capacitance between the substrate support surface and a plasma surface.

Systems and methods for controlling a voltage waveform at a substrate during plasma processing

Disclosed herein is a method and apparatus for controlling surface characteristics by measuring capacitance of a process kit ring. The method includes interfacing a ring with a jig assembly for measuring capacitance in at least a first location of the ring. The ring has that includes a top surface, a bottom surface, and an inner surface opposite an outer surface. At least the bottom surface has an external coating placed thereon. The method further includes contacting a measuring device to the first location on the outer surface proximate the bottom surface. The measuring device contacts an opening in the external coating to the body. The measuring device contacts a first conductive member that is electrically coupled to the ring. A capacitance is measured on the measuring device. The capacitance across the top surface is measured.

Apparatus and method for controlling edge ring variation

Methods of semiconductor processing may include performing a process on a semiconductor substrate. The semiconductor substrate may be seated on a substrate support positioned within a processing region of a semiconductor processing chamber. The methods may include flowing a first backside gas through the substrate support at a first flow rate. The methods may include removing the semiconductor substrate from the processing region of the semiconductor processing chamber. The methods may include performing a plasma cleaning operation within the processing region of the semiconductor processing chamber. The methods may include flowing a second backside gas through the substrate support at a second flow rate. At least a portion of the second backside gas may flow into the processing region through accesses in the substrate support.

Condition selectable backside gas

An apparatus for processing substrates that includes a process chamber with a process volume and a conductance liner surrounding the process volume wherein the conductance liner has at least one fixed portion and a movable portion. The movable portion is configured to expose a substrate transfer slot in a wall of the process chamber. The apparatus also includes a lifting assembly with an actuator attached to the movable portion of the conductance liner. The lifting assembly is configured to move the movable portion of the conductance liner in a vertical direction to expose the substrate transfer slot.

Methods and apparatus for conductance liners in semiconductor process chambers

A method for removing etchant byproduct from an etch reactor and discharging a substrate from an electrostatic chuck of the etch reactor is provided. One or more layers on a substrate electrostatically secured to an electrostatic chuck within a chamber of the etch reactor is etched using a first plasma, causing an etchant byproduct to be generated. A portion of the one or more layers are covered by a photoresist. After the etching is complete, a second plasma is provided into the chamber for a time period sufficient to trim the photoresist and remove a portion of the etchant byproduct. A second time period sufficient to electrostatically discharge the substrate using the second plasma is determined. Responsive to deactivating one or more chucking electrodes of the electrostatic chuck, the second plasma is provided into the chamber for the second time period and the substrate is removed from the chamber.

Integrated cleaning process for substrate etching

Embodiments of the disclosure provided herein include a method for processing a substrate in a plasma processing system. The method includes receiving a first synchronization waveform signal from a controller, delivering a first burst of first voltage pulses to an electrode assembly after receiving a first portion of the first synchronization waveform signal, wherein at least one first parameter of the first voltage pulses is set to a first value based on a first waveform parameter within the first portion of the first synchronization waveform signal, and delivering a second burst of second voltage pulses to the electrode assembly after receiving a second portion of the first synchronization waveform signal, wherein the at least one first parameter of the first voltage pulses is set to a second value based on a difference in the first waveform parameter within the second portion of the first synchronization waveform signal.

Multi-shape voltage pulse trains for uniformity and etch profile tuning

Embodiments of the disclosure provided herein include an apparatus and method for the plasma processing of a substrate in a processing chamber. More specifically, embodiments of this disclosure describe a biasing scheme that is configured to provide a pulsed-voltage (PV) waveform delivered from one or more pulsed-voltage (PV) generators to the one or more electrodes within the processing chamber. The plasma process(es) disclosed herein can be used to control the shape of an ion energy distribution function (IEDF) and the interaction of the plasma with a surface of a substrate during plasma processing.

Plasma processing assembly using pulsed-voltage and radio-frequency power

Methods and apparatus for a lift pin mechanism for substrate processing chambers are provided herein. In some embodiments, the lift pin mechanism includes a lift pin comprising a shaft with a top end, a bottom end, and a coupling end at the bottom end; a bellows assembly disposed about the shaft. The bellows assembly includes an upper bellows flange having an opening for axial movement of the shaft; a bellows having a first end coupled to a lower surface of the upper bellows flange such that the shaft extends into a central volume surrounded by the bellows; and a bellows guide assembly coupled to a second end of the bellows to seal the central volume. The shaft is coupled to the bellows guide assembly at the coupling end. The bellows guide assembly is axially movable to move the lift pin with respect to the upper bellows flange.

Lift pin mechanism

Apparatuses including a height-adjustable edge ring, and methods for use thereof are described herein. In one example, a process kit for processing a substrate is provided. The process kit has a support ring comprising an upper surface having an inner edge disposed at a first height and an outward edge disposed at a second height less than the first height, the inner edge having a greater thickness than the outward edge. An edge ring is disposed on the support ring, an inner surface of the edge ring interfaced with the inner edge of the support ring. A cover ring is disposed outward of the edge ring, the edge ring independently moveable relative to the support ring and the cover ring. Push pins are disposed inward of the cover ring, the push pins operable to elevate the edge ring while constraining radial movement of the support ring.

Wafer edge ring lifting solution

Embodiments of this disclosure describe a feedback loop that can be used to maintain a nearly constant sheath voltage and thus creating a mono-energetic IEDF at the surface of the substrate. The system described herein consequently enables a precise control over the shape of IEDF and the profile of the features formed in the surface of the substrate.

Feedback loop for controlling a pulsed voltage waveform

The present disclosure generally relates to a method and apparatus for determining a metric related to erosion of a ring assembly used in an etching within a plasma processing chamber. In one example, the apparatus is configured to obtain a metric indicative of erosion on an edge ring disposed on a substrate support assembly in a plasma processing chamber. A sensor obtains the metric for the edge ring. The metric correlates to the quantity of erosion in the edge ring. In another example, the ring sensor may be arranged outside of a periphery of a substrate support assembly. The metric may be acquired by the ring sensor through a plasma screen.

Sensors and system for in-situ edge ring erosion monitor

Embodiments provided herein generally include plasma processing systems configured to preferentially clean desired surfaces of a substrate support assembly by manipulating one or more characteristics of an in-situ plasma and related methods. In one embodiment, a plasma processing method includes generating a plasma in a processing region defined by a chamber lid and a substrate support assembly, exposing an edge ring and a substrate supporting surface to the plasma, and establishing a pulsed voltage (PV) waveform at the edge control electrode.

Plasma chamber and chamber component cleaning methods

Embodiments of the disclosure provided herein include an apparatus and method for the plasma processing of a substrate in a processing chamber. More specifically, embodiments of this disclosure describe a biasing scheme that is configured to provide a radio frequency (RF) generated RF waveform from an RF generator to one or more electrodes within a processing chamber and a pulsed-voltage (PV) waveform delivered from one or more pulsed-voltage (PV) generators to the one or more electrodes within the processing chamber. The plasma process(es) disclosed herein can be used to control the shape of an ion energy distribution function (IEDF) and the interaction of the plasma with a surface of a substrate during plasma processing.

Plasma processing using pulsed-voltage and radio-frequency power

Growing community of inventors

San Jose, CA, United States of America

Rajinder Dhindsa