Denso Corporation

Hitachi, Ltd.

Denson Corporation

Rajesh Kumar

Florin Udrea

Tsuyoshi Yamamoto

Andrei Mihaila

Hiroki Nakamura

Mitsuhiro Kataoka

Yuichi Takeuchi

Masami Naito

Toshiyuki Morishita

Atsuo Watanabe

Kunihiko Hara

Tsunenobu Kimoto

Kazukuni Hara

Hiroyuki Matsunami

Takasumi Ohyanagi

Yuuichi Takeuchi

Jun Kojima

Suhail Rashid Jeremy

Eiichi Okuno

Shoichi Onda

Takamasa Suzuki

A silicon carbide (SiC) substrate is provided with an off-oriented {0001} surface whose off-axis direction is &#x3c;11-20&#x3e;. A trench is formed on the SiC to have a stripe structure extending toward a &#x3c;11-20&#x3e; direction. An SiC epitaxial layer is formed on an inside surface of the trench.

Silicon carbide semiconductor device

A silicon carbide semiconductor device includes: a semiconductor substrate including first and second gate layers, a channel layer, a source layer, and a trench; a gate wiring having a first portion and a plurality of second portions; and a source wiring having a third portion and a plurality of fourth portions. The trench extends in a predetermined extending direction. The first portion connects to the first gate layer in the trench, and extends to the extending direction. The second portions protrude perpendicularly to be a comb shape. The third portion extends to the extending direction. The fourth portions protrude perpendicularly to be a comb shape, and electrically connect to the source layer. Each of the second portions connects to the second gate layer through a contact hole.

A manufacturing method of a silicon carbide semiconductor device includes the steps of: preparing a semiconductor substrate including a silicon carbide substrate, a drift layer and a first semiconductor layer; forming a plurality of first trenches in a cell portion; forming a gate layer on an inner wall of each first trench by an epitaxial growth method; forming a first insulation film on the surface of the semiconductor substrate; forming a gate electrode on the first insulation film for connecting to the gate layer electrically; forming a source electrode on the first insulation film for connecting to the first semiconductor layer in the cell portion; and forming a drain electrode connected to the silicon carbide substrate electrically.

Method for manufacturing silicon carbide semiconductor device

A silicon carbide semiconductor device includes a substrate and a junction field effect transistor. The transistor includes: a first semiconductor layer disposed on the substrate; a first gate layer disposed on a surface of the first semiconductor layer; a first channel layer adjacent to the first gate layer on the substrate; a first source layer connecting to the first channel layer electrically; a second gate layer adjacent to the first channel layer to sandwich the first channel layer; a second channel layer adjacent to the second gate layer to sandwich the second gate layer; a third gate layer adjacent to the second channel layer to sandwich the second channel layer; and a second source layer connecting to the second channel layer electrically.

Silicon carbide semiconductor device having junction field effect transistor and method for manufacturing the same

A semiconductor device includes a first field effect transistor including a source and a gate and disposed in a silicon carbide substrate; and a second field effect transistor including a drain and a gate and disposed in the substrate. The drain of the second field effect transistor connects to the source of the first field effect transistor. The gate of the second field effect transistor connects to the gate of the first field effect transistor.

Semiconductor device provided by silicon carbide substrate and method for manufacturing the same

Silicon carbide semiconductor device and method for manufacturing the same

A silicon carbide semiconductor device that includes J-FETs has a drift layer of epitaxially grown silicon carbide having a lower impurity concentration level than a substrate on which the drift layer is formed. Trenches are formed in the surface of the drift layer, and first gate areas are formed on inner walls of the trenches. Second gate areas are formed in isolation from the first gate areas. A source area is formed on channel areas, which are located between the first and second gate areas in the drift layer. A method of manufacturing the device ensures uniform channel layer quality, which allows the device to have a normally-off characteristic, small size, and a low likelihood of defects.

Silicon carbide semiconductor device and manufacturing method

Gate wiring layout for silicon-carbide-based junction field effect transistor

A silicon carbide semiconductor device includes: a semiconductor substrate including a base substrate, a first semiconductor layer, a second semiconductor layer and a third semiconductor layer, which are laminated in this order; a cell portion disposed in the semiconductor substrate and providing an electric part forming portion; and a periphery portion surrounding the cell portion. The periphery portion includes a trench, which penetrates the second and the third semiconductor layers, reaches the first semiconductor layer, and surrounds the cell portion so that the second and the third semiconductor layers are divided by the trench substantially. The periphery portion further includes a fourth semiconductor layer disposed on an inner wall of the trench.

A silicon carbide power device includes a junction field effect transistor and a protective diode, which is a Zener or PN junction diode. The PN junction of the protective diode has a breakdown voltage lower than the PN junction of the transistor. Another silicon carbide power device includes a protective diode, which is a Schottky diode. The Schottky diode has a breakdown voltage lower than the PN junction of the transistor by adjusting Schottky barrier height or the depletion layer formed in the semiconductor included in the Schottky diode. Another silicon carbide power device includes three protective diodes, which are Zener diodes. Two of the protective diodes are used to clamp the voltages applied to the gate and the drain of the transistor due to surge energy and used to release the surge energy. The last diode is a thermo-sensitive diode, with which the temperature of the JFET is measured.

Silicon carbide power device having protective diode

A channel layer is formed on an n -type epitaxial layer and first gate areas and field enhanced area(s) and second gate areas are formed on the first gate areas Furthermore, n -type source areas and a third gate area are formed on the second gate areas These steps result in a device structure having a first J-FET with the n -type source areas and the n -type substrate as a source and drain and the first gate areas at the right and left in the figure as a gate; and the second J-FET with the n -type source areas and the n -type substrate as a source and drain and the second gate areas and the third gate area as a gate. The first J-FET is normally-on, while the second J-FET is normally-off.

A semiconductor device, comprising: a semiconductor substrate comprising silicon carbide of a first conductivity type; a silicon carbide epitaxial layer of the first conductivity type; a first semiconductor region formed on the semiconductor substrate and comprising silicon carbide of a second conductivity type; a second semiconductor region formed on the first semiconductor region, comprising silicon carbide of the first conductivity type and separated from the semiconductor substrate of the first conductivity type by the first semiconductor region; a third semiconductor region formed on the semiconductor region, connected to the semiconductor substrate and the second semiconductor region, comprising silicon carbide of the first conductivity type, and of higher resistance than the semiconductor substrate; and a gate electrode formed on the third semiconductor region via an insulating layer; wherein the third semiconductor layer is depleted when no voltage is being applied to the gate electrode so that said semiconductor device has a normally OFF characteristic.

Growing community of inventors

Nagoya, Japan

Rajesh Kumar