Kla Tencor Corporation

Raghav Babulnath

Lisheng Gao

Satya Kurada

Thirupurasundari Jayaraman

Gangadharan Sivaraman

Kenong Wu

Srikanth Kandukuri

Kwok Ng

Martin Plihal

Eugene Shifrin

Hong Chen

Santosh Bhattacharyya

Masatoshi Yamaoka

Prasanti Uppaluri

Sankar Venkataraman

Ardis Liang

Vidyasagar Anantha

Raghavan Konuru

Shuo Sun

Rahul Lakhawat

Oksen Toros Baris

Pavan Kumar

Avijit K Ray-Chaudhuri

Karthikeyan Subramanian

Manikandan Mariyappan

Various embodiments for detecting defects on a wafer are provided. One method includes acquiring output generated by an inspection system for a wafer during an inspection process that is performed after at least first and second process steps have been performed on the wafer. The first and second process steps include forming first and second portions, respectively, of a design on the wafer. The first and second portions of the design are mutually exclusive in space on the wafer. The method also includes detecting defects on the wafer based on the output and determining positions of the defects with respect to the first and second portions of the design. In addition, the method includes associating different portions of the defects with the first or second process step based on the positions of the defects with respect to the first and second portions of the design.

Inspection for multiple process steps in a single inspection process

Methods and systems for creating a sample of defects for a specimen are provided. One method includes detecting defects on a specimen based on output generated by a detector of an output acquisition subsystem. For the defects detected in an array region on the specimen, where the array region includes multiple array cell types, the method includes stacking information for the defects based on the multiple array cell types. The stacking includes overlaying design information for only a first of the multiple array cell types with the information for only the defects detected in the first of the multiple array cell types. In addition, the method includes selecting a portion of the detected defects based on results of the stacking thereby creating a sample of the detected defects.

Creating defect samples for array regions

Systems and methods for classifying defects detected on a wafer are provided. One method includes detecting defects on a wafer based on output generated for the wafer by an inspection system. The method also includes determining one or more attributes for at least one of the defects based on portions of a standard reference image corresponding to the at least one of the defects. The method further includes classifying the at least one of the defects based at least in part on the one or more determined attributes.

Defect detection and classification based on attributes determined from a standard reference image

Methods and systems for determining a position of output generated by an inspection subsystem in design data space are provided. In general, some embodiments described herein are configured for substantially accurately aligning inspection subsystem output generated for a specimen to a design for the specimen despite deformation of the design in the inspection subsystem output. In addition, some embodiments are configured for generating and/or using alignment targets that can be shared across multiple specimens of the same layer and design rule for alignment of inspection subsystem output generated for a specimen to a design for the specimen.

Sub-pixel alignment of inspection to design

Methods and systems for dynamic design attributes for wafer inspection are provided. One method includes, at run time of a wafer inspection recipe, prompting a user of a wafer inspection tool on which the wafer inspection recipe is performed for information for a design based binning (DBB) process. The information includes one or more formulae for calculating design attributes from a design for a wafer. The design attributes are used to bin the defects in the DBB process. The method also includes performing inspection of a wafer according to an updated wafer inspection recipe. Performing the inspection includes binning defects detected on the wafer according to the DBB process in the updated wafer inspection recipe.

Dynamic design attributes for wafer inspection

Methods and systems for generating inspection results for a specimen with an adaptive nuisance filter are provided. One method includes selecting a portion of events detected during inspection of a specimen having values for at least one feature of the events that are closer to at least one value of at least one parameter of the nuisance filter than the values for at least one feature of another portion of the events. The method also includes acquiring output of an output acquisition subsystem for the sample of events, classifying the events in the sample based on the acquired output, and determining if one or more parameters of the nuisance filter should be modified based on results of the classifying. The nuisance filter or the modified nuisance filter can then be applied to results of the inspection of the specimen to generate final inspection results for the specimen.

Adaptive nuisance filter

Systems and methods for detecting defects on a wafer are provided. One method includes generating test image(s) for at least a portion of an array region in die(s) on a wafer from frame image(s) generated by scanning the wafer with an inspection system. The method also includes generating a reference image for cell(s) in the array region from frame images generated by the scanning of the wafer. In addition, the method includes determining difference image(s) for at least one cell in the at least the portion of the array region in the die(s) by subtracting the reference image from portion(s) of the test image(s) corresponding to the at least one cell. The method further includes detecting defects on the wafer in the at least one cell based on the difference image(s).

Repeater detection

Methods and systems for design based sampling and binning for yield critical defects are provided. One method includes aligning each image patch in each inspection image frame generated for a wafer by an optical subsystem of an inspection system to design information for the wafer. The method also includes deriving multiple layer design attributes at locations of defects detected in the image patches. In addition, the method includes building a decision tree with the multiple layer design attributes. The decision tree is used to separate the defects into bins with different yield impacts on a device being formed on the wafer. The method also includes binning the defects with the decision tree.

Based sampling and binning for yield critical defects

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San Jose, CA, United States of America

Raghav Babulnath