Stats Chippac Pte. Ltd.

Rachel Layda Abinan

Dario S Filoteo, Jr

Emmanuel Espiritu

Leo A Merilo

Philip Lyndon Cablao

Allan Pumatong Ilagan

Zigmund Ramirez Camacho

Il Kwon Shim

Henry Descalzo Bathan

Jairus Legaspi Pisigan

A semiconductor package includes a ball grid array (BGA) substrate having integrated metal layer circuitry, a flip chip chip scale module package (CSMP) having a first integrated passive device (IPD), the flip chip chip scale module package attached to the BGA substrate, and an application die attached to the IPD. A method of manufacturing a semiconductor package includes providing a BGA substrate having integrated metal layer circuitry, attaching a flip chip CSMP having a first IPD to the BGA substrate, and attaching an application die to the IPD.

Chip scale module package in BGA semiconductor package

An integrated circuit package system includes a substrate having an opening provided therein, forming a conductor in the opening having a closed end at the bottom, attaching an integrated circuit die over the substrate, and connecting a die interconnect to the integrated circuit die and the closed end of the conductor.

Integrated circuit package system with bonding in via

A method of manufacture of an integrated circuit packaging system includes: providing a die paddle and a lead adjacent to the die paddle; mounting an integrated circuit, having a bond pad, over the die paddle; forming a bonding interconnect on the bond pad; attaching a circuit end of an internal interconnect to the bonding interconnect, the bonding interconnect between the circuit end and the bond pad; and connecting a lead end of the internal interconnect to the lead.

Integrated circuit packaging system with interconnects and method of manufacture thereof

An integrated circuit package system includes providing a substrate having an integrated circuit, attaching a heatspreader having a force control protrusion on the substrate, and forming an encapsulant over the heatspreader and the integrated circuit.

Integrated circuit package system with heatspreader

An integrated circuit package system is provided forming an integrated circuit die having a first bond pad provided thereon, forming an interconnect stack on a first external interconnect, and connecting the interconnect stack to the first bond pad.

Integrated circuit package system having interconnect stack and external interconnect

A semiconductor package includes a leadframe having first and second level downset lead extensions, a quad flat nonleaded package (QFN) attached to the first level downset lead extension, and a flip chip die attached to the second level downset lead extension. Another embodiment of a semiconductor package includes a leadframe having a lead, a first quad flat nonleaded package (QFN) connected to the lead, and a second quad flat nonleaded package invertly connected to a top surface of the first quad flat nonleaded package, wherein the second quad flat nonleaded package is wirebonded to the lead. A third embodiment of a semiconductor package includes a leadframe having a lead with a first level downset lead extension, a quad flat nonleaded package (QFN) connected to the first level downset lead extension, and a first wirebondable die attached to a top or bottom surface of the quad flat nonleaded package.

Method of forming quad flat package

Quad flat package

A stacked integrated circuit package system is provided forming a first stack layer having a first integrated circuit die on a first substrate, forming a second stack layer having a second integrated circuit die on a second substrate, and mechanically and electrically connecting a spacer layer having a first passive component between the second stack layer and the first stack layer.

Stacked integrated circuits package system with passive components

An integrated circuit packaging system is provided including forming an interposer having a coupling slot, securing an upper die on the interposer, mounting the interposer over an integrated circuit, and coupling the integrated circuit to the upper die through the coupling slot.

Growing community of inventors

Singapore, Singapore

Rachel Layda Abinan