Fairchild Semiconductor Corporation

Fairchild Semiconductor Corporatio

Qiuxiao Qian

Yong Liu

Yumin Liu

Howard Allen

Mike Speed

JungTae Lee

Jiangyuan Zhang

JiangYuan Zhang

Margie T Rios

Zhongfa Yuan

William Robert Newberry

Honorio T Granada, Jr

Jianhong Ju

Scott Irving

Luke Huiyong Chung

Huiyong Luke Chung

A semiconductor die package. Embodiments of the semiconductor die package are usable in backlight circuitry. Systems in packages may include a bridge circuit or a part thereof, and a integrated circuit die, such as a driver die, encapsulated by a molding material or other package. The bridge circuit may be stacked on opposing surfaces of a leadframe.

Semiconductor die package including IC driver and bridge

Disclosed are semiconductor die packages constructed from modules of embedded semiconductor dice and electrical components. In one embodiment, a semiconductor die package comprises a first module and a second module attached to the first module. One or more semiconductor dice are embedded in the first module, and one or more electrical components, such as surface-mounted components, are embedded in the second module. The first module may be formed by a lamination process, and the second module may be formed by a lamination process or a molding process. Patterned metal layers and vias provide electrical interconnections to the package and among the die and components of the package. The second module may be attached to the first module by coupling interconnect lands of separately manufactured modules to one another, or may be directly attached by lamination or molding.

Embedded semiconductor power modules and packages

A multiple-chip package has top and bottom pre-molded leadframes formed prior to the flip-chip attachment of semiconductor die to the leadframes. After die attachment, underfill is used to encase all but one surface of the die, and the top and bottom leadframes are joined together by solder bump balls with the exposed surfaces of the semiconductor dice proximate to each other.

Embedded die package on package (POP) with pre-molded leadframe

A molded, leadless packaged semiconductor multichip module includeshas four mosfetsfor a full bridge circuit. The mosfets may include two N-channel and two P-channel devices or four mosfets of the same type, but four N-channel are preferred. In modulethere are two leadframesfor assembling the mosfets. In particular, the two N-channel and two P-channel devices are disposed between two leadframes and encapsulated in an electrically insulating molding compound. The resulting package has four upper heat sinks-that are exposed in the molding compoundfor transferring heat from the mosfets to the ambient environment. No wire bonds are required. This can significantly reduce the on resistance, RDS. The top or source-drain lead framemay be soldered to the sources and gates of the bridge mosfets.

Four MOSFET full bridge module

Four mosfet full bridge module

Disclosed in this specification is a buck converter package with stacked dice and a process for forming a buck converter. The package includes a die attach pad with a low side die mounted on one surface and a high side die mounted on the opposing surface. The die attach pad is conductive, such that the drain of the low side die is connected to the source of the high side die through the pad. A controller die controls the gates of the high and low side dies. A plurality of leads extends outside of the package to permit electrical connections to the inside of the package. The high side drain is exposed to one of the surfaces of the package.

Semiconductor package with stacked dice for a buck converter

An encapsulated buck converter module includes a low side transistor and a control integrated circuit bonded to a first section on a first side of a leadframe, a first clip between a source of the low side transistor and a second section, a source contact of a high side transistor attached to the first section on a second side of the leadframe with a gate contact of the high side transistor attached to a third section, a conductive member attached to the first and second sections on the second side of the leadframe wherein the first side of the conductive member attached to the second conductive member forms a conductive path with a portion of a second side of the conductive member while any portion of the first side of the conductive member attached to the first component attachment section is insulated from the first side of the conductive member, a first plate of a capacitor attached to a drain contact of the high side transistor and a second plate of the capacitor attached to the second side of the conductive member, and means for forming an external connection to the drain contact of the high side transistor.

FLMP buck converter with a molded capacitor and a method of the same

A semiconductor die package. The semiconductor die package includes a leadframe structure comprising a first die attach pad, and a second die attach pad laterally spaced from the first die attach pad, a first side and a second side opposite to the first side. The semiconductor die package further includes a first semiconductor die attached the first die attach pad at the first side of the leadframe structure, and a second semiconductor die attached to the second die attach pad at the second side of the leadframe structure. The semiconductor die package further includes a housing material covering at least a portion of the leadframe structure, the first semiconductor die, and the second semiconductor die.

Semiconductor die package including multiple semiconductor dice

Pre-molded component packages that may be as thin as a leadframe for a semiconductor die, systems using the same, and methods of making the same are disclosed. The leads of an exemplary package are exposed at both surfaces at the leadframe. The packages may be stacked upon one another and electrically coupled at the exposed portions of their leads.

Stacking quad pre-molded component packages, systems using the same, and methods of making the same

Disclosed are semiconductor die packages having overlapping dice, systems that use such packages, and methods of making such packages. An exemplary die package comprises a leadframe, a first semiconductor die, and a second semiconductor die that has a recessed portion in one of its surfaces. The first die is disposed over a first portion of the leadframe, and the second die is disposed over a second portion of the leadframe with its recess portion overlying at least a portion of the first die. Another exemplary die package comprises a leadframe with a recessed area, a first semiconductor die disposed in the recessed area, and a second semiconductor die overlying at least a portion of the first die. Preferably, electrically conductive regions of both dice are electrically coupled to a conductive region of the leadframe to provide an interconnection between dice that has very low parasitic capacitance and inductance.

Semiconductor die packages having overlapping dice, system using the same, and methods of making the same

A semiconductor die package. It includes a substrate having a first surface and a second surface, a first semiconductor die having its front surface facing the first surface of the substrate, a conductive adhesive disposed between the first semiconductor die and the first surface of the substrate, and a second semiconductor die located on the first semiconductor die. The front surface of second semiconductor die faces away from the first semiconductor die, and the back surface faces toward the first semiconductor die. A plurality of conductive structures electrically couple regions at the front surface of the second semiconductor die to conductive regions at the first surface of the substrate.

Stacked dual-die packages, methods of making, and systems incorporating said packages

A multichip module buck converterhas a high side power mosfet, a low side power mosfetand a pre-molded leadframebetween the two mosfets for connecting the source of mosfetto the drain of mosfet. Clipsandcarry the source, gate and drain terminals of the mosfet from planes parallel but spaced apart to a common plane.

Stacked synchronous buck converter

A semiconductor die package. Embodiments of the package can include a substrate with solid conductive pins disposed throughout. A semiconductor die can be attached to a surface of the substrate. Electrical connection to the semiconductor die can be provided by the solid conductive pins.

Growing community of inventors

Jiangsu, China

Qiuxiao Qian