Texas Instruments Corporation

Qing-Tang Jiang

Jiong-Ping Lu

Kenneth D Brennan

Robert Yung-Hsi Tsu

Joseph D Luttmer

Changming Jin

Richard Allen Faust

Richard A Faust, Jr

A copper interconnect having a transition metal-silicon-nitride barrier (). A transition metal-nitride is co-deposited with Si by reactive sputtering in a Si containing ambient to form barrier (). The copper () is then deposited over the transition metal-silicon-nitride barrier () with good adhesion.

In-situ co-deposition of Si in diffusion barrier material depositions with improved wettability, barrier efficiency, and device reliability

A method of manufacturing a semiconductor device includes the steps of providing a semiconductor substrate (), forming a dielectric layer () over the semiconductor substrate (), and etching a trench or a via () in the dielectric layer () to expose a portion of the surface of the semiconductor substrate (). The method also includes the step of forming a conductive layer () within in the trench or the via (). The method further includes the steps of polishing a portion of the conductive layer () and annealing the conductive layer () at a predetermined temperature. Moreover, the conductive layer () also includes a dopant, and the dopant diffuses substantially to the surface of the top side of the conductive layer () to form a dopant oxide layer () when the conductive layer () is annealed at the predetermined temperature and the dopant is exposed to oxygen.

Semiconductor device with a conductive layer including a copper layer with a dopant

In an integrated device, a via is formed in a substrate layer and a barrier layer is formed on the substrate layer in the via. A seed layer is formed on the barrier layer in the via. The seed layer includes a first material and a second material. The first material provides an ability for the second material to maintain an adherence to the barrier layer.

Method and apparatus for improving adhesion between layers in integrated devices

The structure and the fabrication method of an integrated circuit in the horizontal surface of a semiconductor body comprising a dielectric layer over said semiconductor body and a substantially vertical hole through the dielectric layer, the hole having sidewalls and a bottom. A barrier layer is positioned over the dielectric layer including the sidewalls within the hole and the bottom of the hole; the barrier layer is operable to seal copper. A copper-doped transition layer is positioned over the barrier layer; the transition layer has a resistivity higher than pure copper and is operable to strongly bond to copper and to the barrier layer, whereby electomigration reliability is improved. The remainder of said hole is filled with copper. The hole can be either a trench or a trench and a via.

Copper transition layer for improving copper interconnection reliability

Semiconductor devices and methods of manufacturing such semiconductor devices

The electroplating of copper is the leading technology for forming copper lines on integrated circuits. In the copper electroplating process a negative potential is applied to the semiconductor wafer with the surface of the semiconductor wafer acting as the cathode. The anode will be partially or wholly formed with copper. Both the anode and the semiconductor will be exposed to a solution comprising copper electrolytes. By reducing the temperature of the copper electrolytes solution below 25&deg; C. the rate of self annealing grain growth will increase reducing the final resistively of the copper lines.

Method for improved cu electroplating in integrated circuit fabrication

A method of fabricating an integrated circuit. A thin liner ( ) is deposited over dielectric layer including within a trench ( ) and/or via ( ). The thin liner ( ) smoothes the sidewalls of the trench ( ) and/or via ( ) and reduces resistivity. The thin liner may comprise an organic or inorganic dielectric ( ) or metal ( ). A copper interconnect structure ( ) is then formed over the thin liner ( ).

Growing community of inventors

Austin, TX, United States of America

Qing-Tang Jiang