Synopsys, Inc.

Other

Qiliang Yan

Lawrence S Melvin, Iii

James Patrick Shiely

Jianliang Li

Hongbo Zhang

Benjamin David Painter

Yongfa Fan

Levi D Barnes

Amyn A Poonawala

Ulrich Karl Klostermann

Ebo H Croffie

Yudhishthir Prasad Kandel

Qiaolin Zhang

Nikolay Voznesenskiy

Lin Zhang

Zhijie Deng

Abani M Biswas

Alakananda A Biswas, Legal Representative

Paul VanAdrichem

Laurent Depre

Peter Brooker

Qian Ren

Ebo Kwabena Gyan Croffie

Certain aspects relate to a method for improving a lithography configuration. In the lithography configuration, a source illuminates a mask to expose resist on a wafer. A processor determines a defect-based focus exposure window (FEW). The defect-based FEW is an area of depth of focus and exposure latitude for the lithography configuration with an acceptable level of defects on the wafer. The defect-based FEW is determined based on a predicted probability distribution for occurrence of defects on the wafer. A processor also determines a critical dimension (CD)-based FEW. The CD-based FEW is an area of depth of focus and exposure latitude for the lithography configuration with an acceptable level of CD variation on the wafer. It is determined based on predicted CDs on the wafer. The lithography configuration is modified based on increasing an area of overlap between the defect-based FEW and the CD-based FEW.

Lithography improvement based on defect probability distributions and critical dimension variations

A method and apparatus of a novel modeling scheme for performing optical lithography simulation for a multi-tone mask with a plurality of mask tones is described. The method generates a transmission function matrix based on a setting of the multi-tone mask. The method applies the transmission function matrix to transform a formula for calculating light intensity from Abbe's form to Hopkins' form while maintaining the accuracy of Abbe's form. The method then computes the light intensity using the transformed formula.

Integrated mask-aware lithography modeling to support off-axis illumination and multi-tone masks

A two-dimensional representation of a polygon is converted to a parametric representation. A smoothing filter is applied to the parametric representation to produce corner rounding. In some embodiments, a polygon layout plus a model that specifies how much corner rounding should be applied are taken as inputs. The desired amount of rounding to the corners in the input polygons is applied and this produces a new polygon layout with corners that are properly rounded as its output. The process can be implemented so that it does not induce any pattern-size dependent bias. It also can be designed so that it does not induce line-end pullbacks. However, this feature can be turned off if line-end pullbacks are deemed appropriate for the specific application.

Producing mask layouts with rounded corners

A method and apparatus of a novel full chip edge-based mask three-dimensional (3D) model for performing photolithography simulation with consideration for edge coupling effect is described. The method receives a mask design layout in order to perform mask topography effect modeling. The method generates scaling parameters for edge coupling effects. Each scaling parameter has an associated combination of feature width and space. The sum of feature width and space associated with at least one scaling parameter is less than a minimum pitch. The method applies a thick mask model that includes several edge-based kernels to the mask design layout to create a mask 3D residual. To apply the thick mask model to the mask design layout, the method updates the edge-based kernels with the scaling parameters.

MASK3D model accuracy enhancement for small feature coupling effect

Computer-readable medium and methods for photolithographic simulation of scattering. A design layout comprising a layout polygon is received. A skeleton representation of a mask shape that is created responsive to e-beam writing of the layout polygon is generated. The skeleton representation is defined by a plurality of skeleton points. Individual scattering patterns for the skeleton points are selected from a lookup table of pre-determined scattering patterns. Each of the individual scattering patterns representing an amount of optical scattering for a corresponding one of the skeleton points. A simulated wafer image is produced responsive to the individual scattering patterns.

Fast 3D mask model based on implicit countors

A method and apparatus of a novel full chip edge-based mask three-dimensional (3D) model for performing photolithography simulation is described. The method applies a thin mask model to a mask design layout to create a thin mask transmission. The method generates a thick mask model that has a plurality of edge-based kernels. The method applies the thick mask model to the mask design layout to create a mask 3D residual. The method combines the thin mask transmission and the mask 3D residual to create a mask 3D transmission.

Edge-based full chip mask topography modeling

A method for correcting topography proximity effects (TPE) for an integrated circuit (IC) design is described. This method includes dividing the IC design into a plurality of levels (z-direction). Each level can be decomposed into one or more elementary geometries. These elementary geometries can be top view geometries, cross-sectional geometries, half-plane geometries, geometries with single slope sides, and/or geometries with multiple slope sides. The one or more elementary geometries can be compared to primitives in a library. A transfer matrix can be generated using the matching primitives and the elementary geometries. A disturbance matrix can be calculated based on the transfer matrix. This disturbance matrix can advantageously capture a spectrum of a reflective electric field from a spectrum of an incident electric field. Wave propagation through a photoresist layer can be performed using the disturbance matrix for the plurality of levels. A light intensity for TPE correction can be computed based on the wave propagation.

Compact and accurate wafer topography proximity effect modeling for full chip simulation

One embodiment of the present invention provides a system that determines an assist feature placement within a post-optical proximity correction (post-OPC) mask layout. During operation, the system receives a set of target patterns which represent a set of polygons in a pre-OPC mask layout. The system then constructs a focus-sensitive cost function based on the target patterns, wherein the focus-sensitive cost function represents an amount of movement of post-OPC contours of the target patterns in response to changes in focus condition of the lithography system. Next, the system computes a cost-covariance field (CCF field) based on the focus-sensitive cost function, wherein the CCF field is a two-dimensional (2D) map representing changes to the focus-sensitive cost function due to an addition of a pattern at a given location within the post-OPC mask layout. Finally, the system generates assist features for the post-OPC mask layout based on the CCF field.

Evaluating the quality of an assist feature placement based on a focus-sensitive cost-covariance field

One embodiment of the present invention provides techniques and systems for determining modeling parameters for a photolithography process. During operation, the system can receive a layout. Next, the system can determine an iso-focal pattern in the layout. The system can then determine multiple aerial-image-intensity values in proximity to the iso-focal pattern by convolving the layout with multiple optical models, wherein the multiple optical models model the photolithography process's optical system under different focus conditions. Next, the system can determine a location in proximity to the iso-focal pattern where the aerial-image-intensity values are substantially insensitive to focus variations. The system can then use the location and the associated aerial-image-intensity values to determine an optical threshold and a resist bias. The optical threshold and the resist bias can then be used for modeling the photolithography process.

Method and apparatus for determining an optical threshold and a resist bias

One embodiment of the present invention provides a system that determines an assist feature placement within a post-optical proximity correction (post-OPC) mask layout. During operation, the system receives a set of target patterns which represent a set of polygons in a pre-OPC mask layout. The system then constructs a focus-sensitive cost function based on the target patterns, wherein the focus-sensitive cost function represents an amount of movement of post-OPC contours of the target patterns in response to changes in focus condition of the lithography system. Note that the contours of the target patterns substantially coincide with the edges of set of the polygons. Next, the system computes a cost-covariance field (CCF field) based on the focus-sensitive cost function, wherein the CCF field is a two-dimensional (2D) map representing changes to the focus-sensitive cost function due to an addition of a pattern at a given location within the post-OPC mask layout. Finally, the system generates assist features for the post-OPC mask layout based on the CCF field.

Assist feature placement based on a focus-sensitive cost-covariance field

One embodiment of the present invention provides a system that reduces computational complexity in simulating an image resulting from an original mask and an optical transmission system. During operation, the system obtains a set transmission cross coefficient (TCC) kernel functions based on the optical transmission system, and obtains a set of transmission functions for a representative pattern which contains features representative of the original mask. The system constructs a new set of kernel functions based on the TCC kernel functions and the transmission functions for the representative pattern, wherein responses to the new kernel functions in a resulting image corresponding to the representative pattern are substantially uncorrelated with one another. The system further produces an intensity distribution of a resulting image corresponding to the original mask based on the new kernel functions, thereby facilitating prediction of a layout that can be produced from the original mask.

Method and system for correlating physical model representation to pattern layout

One embodiment of the present invention provides a system that identifies an area in a mask layout which is likely to cause manufacturing problems. During operation, the system creates an on-target process model that models a semiconductor manufacturing process under nominal (e.g., optimal) process conditions. The system also creates one or more off-target process models that model the semiconductor manufacturing process under one or more arbitrary (e.g., non-optimal) process conditions. Next, the system computes a process-sensitivity model using the on-target process model and the off-target process models. The system then computes a gradient-magnitude of the process-sensitivity model. Next, the system identifies a problem area in the mask layout using the gradient-magnitude of the process-sensitivity model. Note that identifying the problem area allows it to be corrected, which improves the manufacturability of the mask layout. Moreover, using the gradient-magnitude of the process-sensitivity model to identify the problem area reduces the computational time required to identify the problem area.

Method and apparatus for identifying a manufacturing problem area in a layout using a gradient-magnitude of a process-sensitivity model

One embodiment provides a system for determining an improved process model that models one or more semiconductor manufacturing processes. During operation, the system can receive a first process model. Next, the system can receive a 2-D-pattern detecting kernel which can detect 2-D patterns. The system can then receive a second set of empirical data which is associated with 2-D patterns in a test layout. Next, the system can determine an improved process model using the first process model, the 2-D-pattern detecting kernel, the test layout, and the second set of empirical data.

Method and apparatus for determining a process model using a 2-D-pattern detecting kernel

One embodiment of the present invention determines the effect of placing an assist feature at a location in a layout. During operation, the system receives a first value which was pre-computed by convolving a model with a layout at an evaluation point, wherein the model models semiconductor manufacturing processes. Next, the system determines a second value by convolving the model with an assist feature, which is assumed to be located at a first location which is in proximity to the evaluation point. The system then determines the effect of placing an assist feature using the first value and the second value. An embodiment of the present invention can be used to determine a substantially optimal location for placing an assist feature in a layout.

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Portland, OR, United States of America

Qiliang Yan