Taiwan Semiconductor Manufacturing Comp. Ltd.

Lam Research Corporation

Pin-Chia Su

Li-Te Hsu

Yu-Sheng Su

Yu-Chih Liou

Chung-Tsung Lu

Tai-Yung Yu

Jin-Lin Liang

Yu-Lung Yeh

Chiang-Jen Peng

Wen-Lang Wu

Chu-We Hu

An etchant for removing a porous low-k dielectric layer on a semiconductor substrate includes a hydrofluoric acid-based solvent, a dilating additive for dilating the pores in the porous low-k dielectric, and a passivating additive that forms a passivation layer at the interface between the low-k dielectric layer and the semiconductor substrate.

Silicon wafer reclamation process

A system for chucking and de-chucking a work piece comprises a wafer stage having a chuck support for supporting a chuck. The wafer stage further comprises a chuck mounted on the chuck support for receiving and attaching the work piece thereto; a support lift means for supporting the work piece; a driving means coupled to the support lift means for gradually raising the support lift means to contact the work piece in response to a variable quantity; a controller for receiving the variable quantity; and a regulating means coupled to the driving means and to the controller, the regulating means for controlling the variable quantity going to the driving means when a predetermined variable quantity is detected.

System for securely dechucking wafers

A wafer stage installed in a process chamber for safely dechucking a wafer is provided. In one embodiment, the wafer stage comprises: a chuck support for supporting a chuck; a chuck mounted on the chuck support for receiving and attaching a wafer thereto; a support lift means for supporting the wafer; a driving means coupled to the support lift means for gradually raising the support lift means to contact the wafer in response to a variable quantity; a sensor attached to the driving means for detecting a change in the variable quantity; and a controller for controlling the variable quantity to the driving means when a predetermined variable quantity is detected in comparison to the change in the variable quantity for a predetermined time.

Method and apparatus for safely dechucking wafers

A wafer stage installed in a process chamber for safely dechucking a wafer is provided. In one embodiment, the wafer stage comprises: a chuck support for supporting a chuck; a chuck mounted on the chuck support for receiving and attaching a wafer thereto; a support lift means for supporting the wafer; a driving means coupled to the support lift means for gradually raising the support lift means to contact the wafer in response to a variable quantity; a controller for receiving the variable quantity; and a regulating means coupled to the driving means and to the controller, the regulating means for controlling the variable quantity going to the driving means when a predetermined variable quantity is detected.

Method and apparatus for securely dechucking wafers

By exposing a process control wafer having a porous low-k-dielectric layer thereon in an HF-based low-k dielectric etching solvent comprising a dilating additive and a passivating additive, the pores in the low-k dielectric layer are dilated some of which connect with one another to form one or more continuous channels extending through the thickness of the dielectric layer and allowing the HF-based solvent to reach down to the substrate. Then the passivating additive component of the HF-based etching solvent forms a passivation layer at the dielectric layer and the substrate interface that protects substrate from the HF-based etchant.

The fabrication an NMOS device featuring a shallow source/drain region, performed as part of an integrated process sequence employed to integrate the fabrication of other type devices with the fabrication of the NMOS device, has been developed. A critical feature of the integrated process sequence is the formation of the shallow source/drain region of the NMOS accomplished after formation of the other type devices, thus reducing the risk of exposure of the shallow source/drain region to possible damaging procedures used for the other type devices. In addition the process used to remove a photoresist shape, used to protect the completed other type devices from the shallow source/drain ion implantation procedure, has been modified again to reduce possible damage to the shallow source/drain region. The flow of CFin the plasma tool during the photoresist removing plasma ashing procedure, as well as the length of the post-plasma ashing wet clean procedure, have both been reduced resulting in reduced exposure of the shallow source/drain region to these procedures.

Method of integrating the formation of a shallow junction N channel device with the formation of P channel, ESD and input/output devices

A wafer transfer robot for a wafer processing system, such as a wet bench system, and a method for utilizing the robot. The wafer transfer robot can be constructed by a robot arm that is equipped with a plurality of wafer blades each adapted for picking-up and carrying one of a plurality of wafers. The plurality of wafer blades each has a predetermined thickness, a top surface, a bottom surface and a predetermined spacing from adjacent wafer blades. A plurality of sensors, such as optical sensors, capacitance sensors or magnetic sensors, with at least one mounted on the bottom side of one of the plurality of wafer blades for sensing the presence of metal on a wafer carried on an adjacent wafer blade immediately below the one of the plurality of wafer blades.

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Tainan, Taiwan

Pin-Chia Su