Vlsi Technology, Inc.

Koninklijke Philips Corporation N.V.

Nxp B.v.

Philips Semiconductor, Inc.

Vsli Technology, Inc.

Pierre Leroux

David Howard Ziger

Bryan D Schmidt

Bryan Hubbard

Sethi Satyendra

Anthony Sayka

Stacy W Hall

Edward R Vokoun, Iii

Judy U Galloway

Daniel D Siems

Yuji Yamaguchi

Henry B Taylor, Iii

Edward Dension

Edward Denison

A method for determining the centroid of a wafer target. In one embodiment, the method comprises a series of steps in a stepper, starting with the step of receiving a wafer, having a target set formed therein. Next, a signal is passed over the target set and over a material separating target shapes in the target set. Then a return signal is reflected, and received, from the surface of the target shapes and the material separating them. A location of at least one maxima point of the return signal is identified. Finally, a centroid is determined as the median of the locations of at least one maxima point.

Wafer target design and method for determining centroid of wafer target

In photo-lithography, one may assess the effect of flare due to various exposure tools. In an example embodiment, in a photo-lithography process on a photo resist coated substrate, there is a method for determining the effect of flare on line shortening. The method comprises, at a first die position on the substrate and in a first exposure, printing a first mask that includes a flare pattern corresponding to one corner of the first mask, and in a second exposure, printing a second mask that includes another flare pattern corresponding to an opposite corner of the second mask. At a second die position on the substrate, a composite mask pattern based on features of the first mask and the second is printed. The printed patterns are developed and measurements are obtained therefrom. The effect of flare is determined as a function of the measurements.

Measuring the effect of flare on line width

In photo-lithography, one may assess the effect of flare due to various exposure tools. In an example embodiment, in a photo-lithography process on a photo resist coated substrate, there is a method () for determining the effect of flare on line shortening. The method () comprises, at a first die position on the substrate and in a first exposure, printing a first mask () that includes a flare pattern () corresponding to one corner of the first mask (), and in a second exposure, printing a second mask () that includes another flare pattern corresponding to an opposite corner of the second mask. At a second die position on the substrate, a composite mask pattern () based on features of the first mask and the second is printed. The printed patterns () are developed and measurements () are obtained therefrom. The effect of flare () is determined as a function of the measurements.

A system and method for fabricating integrated circuits using four fine alignment targets per stepper shot. The four alignment targets are disposed within the scribe line on each side of a four-sided stepper shot. The targets on opposites sides of the region are located in mirror-image positions. For example, in a square or rectangular region, the targets could be at the mid-point of each side, or at each corner. Because the scribe lines for adjoining stepper shots overlap, a target in one shot will overlay a target from a preceding shot. In a positive resist process, for example, the target resulting from the overlay will be reduced in size by an amount corresponding to the amount of rotational error, if any. However, the target will still indicate the center of the stepper shot, thereby compensating for the rotational error with no further measurements.

Self-compensating mark design for stepper alignment

A method for determining rotational error portion of total misalignment error in a stepper. In one embodiment, the method comprises a series of steps in a stepper, starting with the step of receiving a wafer, having a first pattern and an error-free fine alignment target, in the stepper. In another step, the wafer is aligned in the stepper using the error-free fine alignment target. Then a second pattern is created on the wafer overlaying said first pattern. In another step, the rotational error portion of the total misalignment error is determined by measuring the circumferential misalignment between the first pattern and the second pattern.

Reticle for determining rotational error

The present invention enables the user to measure process line shortening (PLS) on an overlay tool. In an example embodiment (), to obtain the PLS, the user applies a method to determine the misalignment (MA) of a composite image on a substrate (), from the composite image the user may determine the total line () shortening (TLS) and the equipment line () shortening (ELS). The process line shortening (PLS) is determined () as a function of TLS and ELS.

Overlay box structure for measuring process induced line shortening effect

There is a method for manufacturing wafers. In an example embodiment, the method employs a stepper with a reticle, lens, and stage movement parameters that comprise providing a set of intentionally-misaligned calibration wafers with predetermined input corrections, the input corrections accounting for linearity of response and interactions between the reticle, lens and stage movement parameters of the stepper. The stepper is calibrated by using the predetermined input corrections from the set of intentionally misaligned calibration wafers. Using the calibrated stepper, aligned patterns on the wafers are printed.

Calibration wafer for a stepper

Method for determining rotational error portion of total misalignment error in a stepper

A technique is provided to define a pattern ( ) on a substrate ( ) that includes a dense region with a number of features ( ) and an isolated feature region comprised of at least a part of one of the features ( ). The dense feature region has a greater feature density than the isolated feature region. A reference feature ( ) is measured at a number of different points relative to the isolated feature region and the dense feature region with a measurement tool ( ). An iso-dense effect is determined from these measurements.

Techniques to characterize iso-dense effects for microdevice manufacture

A method for determining wafer misalignment by using a pattern on a fine alignment target. In one embodiment, the method comprises a series of steps in a stepper, starting with the step of receiving a wafer having an alignment target. In another step, the wafer is aligned using the alignment target. Next, a pattern is created around the alignment target using an overlay. Then, the misalignment is determined between the alignment target and the pattern created around the alignment target.

Method for determining wafer misalignment using a pattern on a fine alignment target

Methods and structures for determining alignment during semiconductor wafer processing are described. In one implementation, two geometric shapes are formed at different elevations over a substrate and at least partially overlapping with one another. The two shapes are inspected for overlap to determine whether the two shapes are misaligned. If the shapes are misaligned, a magnitude of misalignment is determined from the degree of overlap of the two shapes. In another implementation, a pair of elevationally spaced-apart geometric shapes are used to translate shifts of the shapes in one direction into quantifiable shift magnitudes using another direction. In yet another implementation, shifts in both the X and Y direction are readily quantifiable through visual inspection.

Semiconductor processing methods and structures for determining alignment during semiconductor wafer processing

A method for determining magnification error portion of total misalignment error in a stepper. In one embodiment, the method comprises a series of steps in a stepper, starting with the step of receiving a wafer, having a first pattern and an error-free fine alignment target, in the stepper. In another step, the wafer is aligned in the stepper using the error-free fine alignment target. Then a second pattern is created on the wafer overlaying said first pattern. In another step, the magnification error portion of the total misalignment error is determined by measuring the radial misalignment between the first pattern and the second pattern.

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San Antonio, TX, United States of America

Pierre Leroux