Lexar Media, Inc.

Micron Technology Incorporated

Cirrus Logic Inc.

Avalanche Technology, Inc.

Lexar Microsystems, Inc.

Lexar

Other

Lexa Media, Inc.

Iman, Berhau

Estakhri, Petro

Petro Estakhri

Berhanu Iman

Mahmud M Assar

Siamack Nemazie

Parviz Keshtbod

Ngon Van Le

Ebrahim Abedifard

Ali R Ganjuei

Rajiv Yadav Ranjan

John S Geldman

Son H Ho

Jerrold Allen Beckmann

Berhau Iman

Neal Anthony Galbo

Martin Ragnar Furuhjelm

Paul M Romano

Larry D King

Steffen Markus Hellmold

Phuc Tran

Maryam Imam

Jarreth Romero Solomon

Joumana Fahim, Legal Representative

Min Guo

John J Schadegg

Sam Nemazie

Frederick Jaffin

Mahmood Mozaffari

Boyd Gayle Pett

Mamud Assar

Mike Machado

Senthil Kumar Chellamuthu

Bhupendra K Ahuja

Ahuja Gurmukhsingh Ramesh

Anson Ba Phan

Palaksha Setty

Robert Reid

Robert Alan Reid

Berhau Imam

Behanu Iman

A memory device has a plurality of dedicated data blocks for storing user data and a plurality of dedicated overhead blocks for storing overhead data. A dedicated overhead block of the plurality of dedicated overhead blocks has a plurality of overhead segments. The overhead segments have physical block address registers configured to store physical block addresses defining respective dedicated data blocks.

Flash memory architecture with separate storage of overhead and user data

A method of writing to magnetic tunnel junctions (MTJs) of a magnetic memory array includes storing in-coming data in a cache register, reading the present logic state of a first one of a set of at least two MTJs, the set of at least two MTJs including the first MTJ and a second MTJ. The in-coming data is to be written into the second MTJ. Further steps are storing the read logic state into a data register, swapping the contents of the data register and the cache register so that the cache register stores the read logic state and the data register stores the in-coming data, applying a first predetermined voltage level to the set of MTJs thereby causing the first MTJ to be over-written, applying a second predetermined voltage level to the set of MTJs, and storing the in-coming data into the second MTJ.

Method and apparatus for writing to a magnetic tunnel junction (MTJ) by applying incrementally increasing voltage level

Methods and apparatus are provided, such as a memory card with a processor and nonvolatile memory coupled thereto. The nonvolatile memory has a secure area configured to store a user password and a serial number in encrypted form. The card is configured to grant access to the secure area when the card receives a password that matches the stored user password and the card is coupled to a system having the serial number.

Secure compact flash

Methods of operating a memory, and memories for performing such methods, include determining that a particular area of the memory is defective, locating a free area of the memory, programming data intended for the particular area of the memory to the free area of the memory, checking the particular area of the memory for data previously programmed to the particular area of the memory, and moving any previously-programmed data from the particular area of the memory to the free area of the memory.

Managing defective areas of memory

A magnetic memory system includes a magnetic random access memory (MRAM) including a plurality of magnetic memory banks and operative to store data during a write operation initiated by a write command. The magnetic memory system further includes a first-in-first-out (FIFO) interface device coupled to the MRAM and including a plurality of FIFOs Each of the magnetic memory banks is coupled to a respective one of the plurality of FIFOs, the FIFO being operative to queue write commands on a per magnetic memory bank basis and further operative to issue the queued write commands at a time when the MRAM is not in use, wherein concurrent write operations are performed to at least two of the plurality of magnetic memory banks.

Emulation of static random access memory (SRAM) by magnetic random access memory (MRAM)

A method of writing to a magneto tunnel junction (MTJ) includes writing data to the MTJ, reading the written data using a first reference MTJ and reading the written data using a second reference MTJ. Based on the reading steps and the result of the comparing step, setting a select bit to select the proper reference for future reads.

Method of sensing data in magnetic random access memory with overlap of high and low resistance distributions

In an embodiment, only one sector of a plurality of sectors in a physical block of a plurality of physical blocks has a sector status location configured to store information that indicates a move status of an other sector of the plurality sectors of the physical block of the plurality of physical blocks, where the only one sector of the plurality of sectors in the physical block of the plurality of physical blocks is configured to store a sector of data in addition to the information that indicates the move status.

Electronic system having memory with a physical block having a sector storing data and indicating a move status of another sector of the physical block

An embodiment of the present invention includes a non-volatile storage unit comprising a first and second N-diffusion well separated by a distance of P-substrate. A first isolation layer is formed upon the first and second N-diffusion wells and the P-substrate. A nano-pillar charge trap layer is formed upon the first isolation layer and includes conductive nano-pillars interspersed between non-conducting regions. The storage unit further includes a second isolation layer formed upon the nano-pillar charge trap layer; and at least one word line formed upon the second isolation layer and above a region of nano-pillar charge trap layer. The nano-pillar charge trap layer is operative to trap charge upon application of a threshold voltage. Subsequently, the charge trap layer may be read to determine any charge stored in the non-volatile storage unit, where presence or absence of stored charge in the charge trap layer corresponds to a bit value.

Flash memory with nano-pillar charge trap

A memory device has a plurality of dedicated data blocks for storing only user data and a plurality of dedicated overhead blocks for storing only overhead data that comprises ECC data that is used for error checking with respect to the user data in the dedicated data blocks. The dedicated data blocks can be erased without erasing the ECC data that is used for error checking with respect to the user data in the dedicated data blocks.

In an embodiment, a non-volatile memory has erasable blocks of memory cells. The one or more of the erasable blocks include a particular block to be identified by a particular group of logical block addresses corresponding to a predetermined group of sectors.

Memory block identified by group of logical block addresses, storage device with movable sectors, and methods

Growing community of inventors

Pleasanton, CA, United States of America

Petro Estakhri