Raytheon Company

Peter S Lyman

William E Hoke

John J Mosca

A semiconductor structure is provided having a III-V substrate, a buffer layer over the substrate, such buffer layer having a compositional graded quaternary lower portion and a compositional graded ternary upper portion. In one embodiment, the lower portion of the buffer layer is compositional graded AlGaInAs and the upper portion is compositional graded AlInAs.

Quaternary-ternary semiconductor devices

The invention provides a method of fabricating a wafer including growing a single crystal layer comprising a III-V compound in a first chamber at a temperature above 350&deg; C. A temperature of a surface of the single crystal layer is reduced to below about 350&deg; C. in the first chamber. An indium arsenide layer is deposited on the single crystal layer, to form an intermediate structure, in the first chamber at a temperature below 350&deg; C. and above 100&deg; C. The intermediate structure is transferred to a second chamber. A surface of the intermediate structure is heated to a temperature above about 600&deg; C. to remove substantially all of the indium arsenide layer and impurities collected in the indium arsenide layer during the transfer to the second chamber. Another material is deposited on the single crystal layer in the second chamber.

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Mendon, MA, United States of America

Peter S Lyman