Infineon Technologies Ag

Infineon Technologies Austria Ag

Technische Universitaet Graz

Peter Irsigler

Hans-Joachim Schulze

Thomas Grille

Ursula Hedenig

Oliver Hellmund

Franz Hirler

Sebastian Schmidt

Andreas Peter Meiser

Markus Zundel

Martina Seider-Schmidt

Anton Mauder

Bernhard Jakoby

Thomas Krotscheck Ostermann

Thomas Christian Neidhart

Ulrich Schmid

Daniel Maurer

Tobias Frischmuth

Johannes Georg Laven

Armin Willmeroth

Rolf Weis

Markus Kahn

Jonathan Silvano De Sousa

Andreas Tortschanoff

Cristina Consani

Thomas Wuebben

Christian Ranacher

Ventsislav M Lavchiev

Thorsten Meyer

Hans Weber

Jens Peter Konrath

Guenther Ruhl

Rudolf Zelsacher

Hanno Melzner

Guenter Denifl

Vijaye Rajaraman

Thomas Popp

Guenter Schagerl

Hans-Peter Lang

Stefan Clara

Joachim Mahler

Ralf Siemieniec

Francisco Javier Santos Rodriguez

Helmut Strack

Wolfgang Werner

Roman Baburske

Manfred Schneegans

Michael Schneider

Johannes Baumgartl

Martin Henning Vielemeyer

Andre Brockmeier

David Laforet

Erich Griebl

Michael Roesner

Friedrich Kroener

Martin Mischitz

Olaf Storbeck

Ulrich Glaser

Holger Huesken

Markus Heinrici

Andreas Moser

Stefan Miethaner

Knut Stahrenberg

Donald Dibra

Sokratis Sgouridis

Robert Wiesner

Caterina Travan

Soenke Pirk

Günter Denifl

Maik Langner

Banafsheh Abasahl

Gerald Puehringer

Sylvicley Figueira Da Silva

Martin Vielemeyer

Ventsislav Lachiev

Manfred Pirker

Markus Dankerl

Markus Neuber

A method of manufacturing a semiconductor body includes forming a pattern at a first side of a substrate, forming a semiconductor layer on the first side of the substrate, attaching the substrate and the semiconductor layer to a carrier via a surface of the semiconductor layer, and removing the substrate from a second side opposite to the first side.

Semiconductor device having contact trenches extending from opposite sides of a semiconductor body

A semiconductor device includes a semiconductor body, a vertical transistor arranged in a first device region of the semiconductor body, and a lateral transistor arranged in a second device region of the semiconductor body. The vertical transistor includes a plurality of drift regions of a first doping type and a plurality of compensation regions of a second doping type complementary to the first doping type. The drift regions and the compensation regions are arranged alternately in a lateral direction of the semiconductor body. The second device region includes a well-like structure of the second doping type surrounding a first semiconductor region of the first doping type. The lateral transistor includes device regions arranged in the first semiconductor region.

Half-bridge circuit including integrated level shifter transistor

A fluid sensor includes a substrate having a top main surface region, wherein the top main surface region of the substrate forms a common system plane of the fluid sensor, a thermal radiation emitter on the top main surface region of the substrate, an optical filter structure on the top main surface region of the substrate, a waveguide on the main top surface region of the substrate, and a thermal radiation detector on the top main surface region of the substrate, wherein the thermal radiation detector provides a detector output signal based on a radiation strength of the filtered thermal radiation received from the waveguide.

Fluid sensor including an optical filter and a waveguide, and method for manufacturing the fluid sensor

A MEMS component includes a semiconductor substrate stack having a first semiconductor substrate and a second semiconductor substrate, wherein the semiconductor substrate stack has a cavity formed within the first and second semiconductor substrates, and wherein at least the first or the second semiconductor substrate has an access opening for gas exchange between the cavity and an environment. A radiation source is arranged at the first semiconductor substrate, and a radiation detector is arranged at the second semiconductor substrate. Two mutually spaced apart reflection elements are arranged in a beam path between the radiation source and the radiation detector, wherein one reflection element is partly transmissive to the emitted radiation from the cavity in the direction of the radiation detector, and wherein an interspace between the two mutually spaced apart reflection elements has a length that is at least ten times the wavelength of the emitted radiation.

MEMS-component

In accordance with an embodiment, a gas sensor includes a substrate having a cavity for providing an optical interaction path; a thermal emitter configured to emit broadband IR radiation; a wavelength selective structure configured to filter the broadband IR radiation emitted by the thermal emitter; and an IR detector configured to provide a detector output signal based on a strength of the filtered IR radiation having traversed the optical interaction path.

Gas sensor

A transistor device may include a semiconductor body, a plurality of cell regions each comprising a plurality of transistor cells that are at least partially integrated in the semiconductor body and that each comprise a respective gate electrode, a plurality of routing channels each arranged between two or more of the cell regions, a gate pad arranged above a first surface of the semiconductor body, and a plurality of gate runners each coupled to the gate pad and each arranged in one of the plurality of routing channels. Each of the plurality of gate runners may be associated with one of the plurality of cell regions such that the gate electrodes in each of the plurality of cell regions are connected to an associated gate runner, and each of the plurality of routing channels comprises two or more gate runners that are routed in parallel and spaced apart.

Transistor device

A method for processing a substrate assembly with a semiconductor device layer includes: arranging an auxiliary carrier at the substrate assembly such that a connection surface of the auxiliary carrier and a first surface of the substrate assembly directly adjoin each other; fixedly attaching the auxiliary carrier to the substrate assembly by melting a carrier portion of the auxiliary carrier and a substrate portion of the substrate assembly that directly adjoins the carrier portion such that the auxiliary carrier and the substrate assembly locally fuse only in fused portions of the auxiliary carrier and the substrate assembly, wherein the fused portions are laterally separated from each other by at least one unfused portion; and processing the semiconductor device layer of the substrate assembly with the auxiliary carrier fixedly attached to the substrate assembly.

Method for processing a substrate assembly and wafer composite structure

A molding compound and a semiconductor arrangement with a molding compound are disclosed. The molding compound includes a matrix and a filler including filler particles. The filler particles each include a core with an electrically conducting or a semiconducting material and an electrically insulating cover.

Molding compound and semiconductor package with a molding compound

A half-bridge circuit includes a low-side transistor and a high-side transistor each having a load path and a control terminal, and a high-side drive circuit having a level shifter with a level shifter transistor. The low-side transistor and the level shifter transistor are integrated in a common semiconductor body.

Half-bridge circuit including a low-side transistor and a level shifter transistor integrated in a common semiconductor body

Devices and methods are provided where a control terminal resistance of a transistor device is set depending on operating conditions within a specified range of operating conditions.

Switch device

A method for exposing a structure on a substrate includes positioning of an invariable reticle and a programmable reticle in a light path between a light source and a layer on a substrate to be exposed to light and exposing the layer on the substrate by light from the light source passing the invariable reticle and the programmable reticle.

Method and apparatus for exposing a structure on a substrate

A method of processing a semiconductor device, comprising: providing a semiconductor body having dopants of a first conductivity type; forming at least one trench that extends into the semiconductor body along a vertical direction, the trench being laterally confined by two trench sidewalls and vertically confined by a trench bottom; applying a substance onto at least a section of a trench surface formed by one of the trench sidewalls and/or the trench bottom of the at least one trench, such that applying the substance includes preventing that the substance is applied to the other of the trench sidewalls; and diffusing of the applied substance from the section into the semiconductor body, thereby creating, in the semiconductor body, a semiconductor region having dopants of a second conductivity type and being arranged adjacent to the section.

Semiconductor device with deep diffusion region

A method includes kicking out impurity atoms from substitutional sites of a crystal lattice of a semiconductor body by implanting particles via a first surface into the semiconductor body, reducing a thickness of the semiconductor body by removing semiconductor material of the semiconductor body, and annealing the semiconductor body in a first annealing process at a temperature of between 300&#xb0; C. and 450&#xb0; C. to diffuse impurity atoms out of the semiconductor body.

Method of reducing an impurity concentration in a semiconductor body

A body structure and a drift zone are formed in a semiconductor layer, wherein the body structure and the drift zone form a first pn junction. A silicon nitride layer is formed on the semiconductor layer. A silicon oxide layer is formed from at least a vertical section of the silicon nitride layer by oxygen radical oxidation.

Forming silicon oxide layers by radical oxidation and semiconductor device with silicon oxide layer

In accordance with an embodiment of an integrated circuit, a cavity is buried in a semiconductor body below a first surface of the semiconductor body. An active area portion of the semiconductor body is arranged between the first surface and the cavity. The integrated circuit further includes a trench isolation structure configured to provide a lateral electric isolation of the active area portion.

Isolation of semiconductor device with buried cavity

Growing community of inventors

Obernberg/Inn, Austria

Peter Irsigler