Yangtze Memory Technologies Co., Ltd.

Huawei Technologies Co., Limited

Huazhong University of Science and Technology

Jinling Institute of Technology

Peng Chen

Houde Zhou

XinRu Zeng

Bo Yang

Yinliang Hu

Dongcheng Pan

Liquan Cai

Chong Zhu

Yusheng Shi

Chunze Yan

Shifeng Wen

Fangchao Yuan

Chao Gu

Zhirong Yang

Mingliang Li

Zhaoqing Li

Ronggang Zhu

Huizhen Yang

Jian Miao

Wei Gu

Jia Li

Meng Wang

Chenhui Li

Hongzhi Wu

Jiamin Wu

Lichao Zhang

Lei Yang

Junhui Wang

Bing Feng

BaoHua Zhang

Xianshuo Li

Zhengqing Qi

Baohua Zhang

Xinru Zeng

Xiangdong Zang

Zhufeng Liu

Xingyun Duan

Jianli Shang

Lijun Qi

Changhong Zhu

Guangzhi Zhu

Xiao Zhu

Chenchui Li

The present disclosure provides a semiconductor structure, comprising a die/die stack attached on a substrate, a conductive top block covering a top surface of the die/die stack, and a plurality of ground wires conductively connect the conductive top block and to the substrate. The conductive top block, the plurality of ground wires, and the substrate form a Faraday cage to provide an electromagnetic interference shielding of the die/die stack.

Electromagnetic interference shielding package structures and fabricating methods thereof

This application discloses a channel sounding method and a communication apparatus. The method includes: A first access point receives a channel transfer command frame from a controller or a central access point, and sends a channel transfer frame to a second access point. The channel transfer command frame indicates the first access point to send a channel sounding result of at least one station to the second access point. The channel transfer command frame includes a first sounding dialog token number. The channel transfer frame carries a channel sounding result corresponding to a first sounding dialog token in channel sounding results of a plurality of stations. The first access point forwards the channel sounding result of the at least one station to the second access point.

Channel sounding method and communication apparatus

This application discloses channel sounding methods and communication apparatuses. One method includes: receiving, by a second access point, a user association frame from a first access point, wherein the user association frame carries identification information of a first station and is used to determine a first channel sounding result of the first station associated with the first access point, and determining, by the second access point, the first channel sounding result from a plurality of second channel sounding results based on the user association frame, wherein the plurality of second channel sounding results are obtained by the second access point by performing sounding on a plurality of channel sounding frames from a plurality of stations.

The disclosure relates to the technical field of optical engineering, and in particular to a model-based adaptive multi-aperture optical fiber coupling control system and a model-based adaptive multi-aperture optical fiber coupling control method. The system includes an optical fiber coupler array, optical fibers, photoelectric detectors, a controller and a high-voltage amplifier, where a plurality of optical fibers and photoelectric detectors are arranged, the optical fiber coupler array consists of a plurality of optical fiber couplers, output ends of the optical fiber couplers are respectively connected with input ends of the photoelectric detectors through the optical fibers, output ends of the photoelectric detectors are respectively connected with input ends of the controller, output ends of the controller are respectively connected with input ends of the high-voltage amplifier, and output ends of the high-voltage amplifier are respectively connected with the optical fiber couplers.

Model-based adaptive multi-aperture optical fiber coupling control system and method

A method for fabricating a substrate structure for packaging includes providing a core substrate, a plurality of conductive pads at a first surface of the core substrate, and a metal layer at a second surface of the core substrate opposite to the first surface; forming a conductive structure, for pasting the substrate structure onto an external component, on each of the plurality of conductive pads; forming a molding compound on the first surface of the core substrate and to encapsulate the conductive structure; and forming a plurality of packaging pads by patterning the metal layer at the second surface of the core substrate.

Substrate structure, and fabrication and packaging methods thereof

In an embodiment an interference cancellation method includes generating, by a first device, a first packet, wherein the first packet comprises a first group of elements, a second group of elements, and user data, the first group of elements being different from the second group of elements and sending, by the first device, the first packet to a second device by using at least one pair of subcarriers, wherein two subcarriers in the at least one pair of subcarriers are symmetrical with respect to a direct current subcarrier, and wherein the first packet is usable by the second device to cancel interference in the user data based on the first group of elements and the second group of elements.

Interference cancellation method, apparatus, and system

A semiconductor package structure includes a substrate, including first conductive pads and packaging pads opposite to the first conductive pads, one or more semiconductor chips stacking on the substrate, a molding compound encapsulating the semiconductor chips, first metal wires connecting the semiconductor chips to the packaging pads, a first metal pad on a side of the molding compound opposite to the substrate, and a second metal wire located in the molding compound and connecting the first metal pad to a chip-contact pad of a semiconductor chip of the semiconductor chips.

Semiconductor package structure and packaging method thereof

The present disclosure includes a semiconductor package including a redistribution layer (RDL) having a first surface in contact with input/output (I/O) contacts and a second surface opposite to the first surface. The semiconductor package also includes a staircase interconnect structure formed on the second surface of the RDL and electrically connected with the RDL. The staircase interconnect structure includes staircase layers including a first staircase layer and a second staircase layer stacked on a top surface of the first staircase layer. The second staircase layer covers a portion of the top surface of the first staircase layer such that a remaining portion of the top surface of the first staircase layer is exposed. Integrated circuit (IC) chips are electrically connected to the RDL via the staircase interconnect structure. A first IC chip of the IC chips is electrically connected to the RDL through the remaining portion of the top surface of the first staircase layer.

Flip-chip stacking structures and methods for forming the same

The present disclosure describes methods and systems for processing semiconductor wafers. A method for processing a wafer includes measuring one or more wafer characteristics of the wafer using a plurality of detectors. The wafer includes a device region and a perimeter region. The method also includes determining a wafer modification profile of the wafer based on the measured one or more wafer characteristics. The method further includes modifying a ring-shaped portion of the wafer within the perimeter region using the wafer modification profile. The modified ring-shaped portion has a penetration depth that is less than a thickness of the wafer. The method further includes performing a wafer thinning process on the wafer.

Method for processing semiconductor wafers

A chip package structure includes multiple chips stacked together, a molding layer encapsulating the multiple chips, a conductive layer is on a side of the molding layer away from the multiple chips, and a vertical conductive element extending from a surface of the molding layer to the bonding pad. Each of the multiple chips includes a bonding pad not covered by the multiple chips. The vertical conductive element connects the conductive layer and the bonding pad. The vertical conductive element includes gold.

Chip package structure and manufacturing method thereof

A laser system for dicing a semiconductor structure is disclosed. The laser system includes a laser source and a laser energy adjusting unit. The laser source is configured to generate a laser. The laser energy adjusting unit is movably provided on a laser light path between the laser source and the semiconductor structure. The laser energy adjusting unit is moved to the laser light path between the laser source and the semiconductor structure based on a first determination that the laser source is focused on a first preset region of the semiconductor structure having a first material.

Laser system for dicing semiconductor structure and operation method thereof

This application provides a data transmission method and apparatus. The method includes: A first access point detects a channel. If the first access point detects an idle first channel, the first access point sends a first trigger frame to at least one second access point, where the first trigger frame is used to trigger the at least one second access point to send data on the first channel after a first preset time period elapses. In this way, an existing CSMA channel detection mechanism may be compatible with the method, and a conflict caused by contention of a plurality of APs for a channel at the same time can be avoided, which helps improve network transmission efficiency, and helps improve transmission performance.

Data transmission method and apparatus

A laser dicing system is disclosed. The laser dicing system includes a host device and a laser source. The host device reads and identifies a mark formed on a surface of a semiconductor structure. The laser source is coupled to the host device and is configured to generate a dicing laser energy to form a trench on the semiconductor structure. The dicing laser energy irradiated on the semiconductor structure is adjustable based on information embedded in the mark.

Laser dicing system and method for dicing semiconductor structure including cutting street

Disclosed is a wavefront correction system based on a Runge-Kutta (RUN) optimization algorithm. The system includes a wavefront corrector, an image sensor, a lens, a computer control module, an image collection card, a digital-to-analog (D/A) converter, and a high-voltage amplifier. A performance index function representing a wavefront distortion correction degree is used as an optimization algorithm objective function, a RUN algorithm is used as a closed-loop correction system control algorithm, and the wavefront corrector is used as a wavefront distortion correction system device. The RUN algorithm controls the wavefront corrector to correct a wavefront aberration. During each iteration, a voltage control signal obtained through the algorithm is amplified and applied to the wavefront corrector, such that a mirror shape of the wavefront corrector is changed, and a corresponding corrected wavefront is generated.

Wavefront correction system based on RUN optimization algorithm

This application provides an uplink multi-station channel estimation method, a station (STA), and an access point (AP), which can be applied to an uplink multi-user multiple-input multiple-output scenario. The uplink multi-station channel estimation method includes: a STA generating a frame including a first group of training sequences and a second group of training sequences, and sending the frame to the AP. The AP calculates a frequency offset value between the STA and the AP based on the received first group of training sequences and the received second group of training sequences. The AP performs channel estimation based on the calculated frequency offset value. According to the technical solutions provided in this application, the AP can more accurately learn of frequency offset values between a plurality of STAs and the AP. This improves channel estimation precision.

Uplink multi-station channel estimation method, station, and access point

Growing community of inventors

Wuhan, China

Peng Chen