Freescale Semiconductor,inc.

University of California

Pawitter J S Mangat

Scott Daniel Hector

Wei E Wu

William J Dauksher

Bernard J Roman

John S Taylor

Sang-In Han

Alan R Stivers

Cesar M Garza

Kevin J Nordquist

Matthew A Thompson

Patrick G Kofron

William Man-Wai Tong

An EUV mask () includes an opening () that helps to attenuate and phase shift extreme ultraviolet radiation using a subtractive rather than additive method. An etch stop layer () may be provided between a lower multilayer reflective stack () and an upper multilayer reflective stack () to ensure an appropriate and accurate depth of the opening. An absorber layer () may be deposited within the opening to sufficiently reduce the amount of reflection within dark region (). Optimal thicknesses and locations of the various layers are described.

Reflective mask useful for transferring a pattern using extreme ultraviolet (EUV) radiation and method of making the same

A semiconductor device is formed by patterning a resist layer using a rim phase shifting mask. A multilayer or single patterning layer to form the different phase-shifting regions and opaque regions is used to manufacture the rim phase shifting mask. First phase shifting regions are formed by transferring an opening in the multilayer or single patterning layer through an opaque layer and a transparent substrate. At least portions of the same multilayer or single patterning layer are used to recess the opaque layer a predetermined distance to form rims (second phase shifting regions). The first phase-shifting regions phase shift the light traveling through them 180 degrees relative to the light traveling through the rims, thereby increasing the contrast of the light traveling through the rim phase shifting mask.

Method of forming a rim phase shifting mask and using the rim phase shifting mask to form a semiconductor device

A process for creating a mask substrate involving depositing: 1) a coating on one or both sides of a low thermal expansion material EUVL mask substrate to improve defect inspection, surface finishing, and defect levels; and 2) a high dielectric coating, on the backside to facilitate electrostatic chucking and to correct for any bowing caused by the stress imbalance imparted by either other deposited coatings or the multilayer coating of the mask substrate. An film, such as TaSi, may be deposited on the front side and/or back of the low thermal expansion material before the material coating to balance the stress. The low thermal expansion material with a silicon overlayer and a silicon and/or other conductive underlayer enables improved defect inspection and stress balancing.

Coatings on reflective mask substrates

Growing community of inventors

Gilbert, AZ, United States of America

Pawitter J S Mangat