Eaton Corporation

Paul R Bie

Joseph A Calviello

David Ward

Ronald J Pomian

On a semiconductor substrate (14, 38) T-type undercut electrical contact structure (12, 36) and methodology provides a diffusion barrier (26, 40) preventing migration therethrough from a gold layer (30, 48) along the sides of an undercut schottky metal lower layer (28, 44) into the active region of the semiconductor substrate. In one embodiment, the diffusion barrier (26) is provided at the base of the gold layer (30). In another embodiment, the gold layer (48) is encapsulated by the diffusion barrier (40) on the bottom (46) and sides (56). The diffusion barrier base layer is deposited. The diffusion barrier side layers are electroplated.

T-type undercut electrical contact on a semiconductor substrate

On a semiconductor substrate (38) T-type undercut electrical contact structure (12, 36) and methodology provides a diffusion barrier (26, 40) preventing migration therethrough from a gold layer (30, 48) along the sides of an undercut schottky metal lower layer (28, 44) into the active region of the semiconductor substrate. In one embodiment, the diffusion barrier (26) is provided at the base of the gold layer (30). In another embodiment, the gold layer (48) is encapsulated by the diffusion barrier (40) on the bottom (46) and sides (56). The diffusion barrier base layer is deposited. The diffusion barrier side layers are electroplated with the remaining portions of the contact structure being masked by selective oxidation.

T-type undercut electrical contact process on a semiconductor substrate

Method for fabrication of quasi-monolithic microwave integrated circuits in which metals, oxides, and processes are selected to enable fabrication of the circuits by first producing many layers of metals and oxides in situ without removing the circuit from its environmental chamber. This reduces inclusion of contaminating chemical films and particles between the desired layers. Circuit elements are then defined by processing of the layers by photolithography and other processes from the top of the circuit downward. Lumped and distributed capacitors, resistors, inductors, transmission lines, and contacts for active devices are monolithically defined, with a reduced number of process steps.

Method for fabricating quasi-monolithic integrated circuits

During fabrication of monolithic microwave integrated circuits, active devices having sources, gates, drains, and/or Schottky barrier junctions are first provided for an epitaxial layers. Then many layers of metals and oxides are produced thereover in situ without removing the circuit from its environmental chamber. Circuit elements are then defined by processing of the many layers sequentially by photolithography and other processes from the top of the chip downward. Certain combinations of metals, oxides, and processes are selected to enable fabrication of circuits from the top down in this way. This reduces inclusion of contaminating chemical films and particles between the desired layers. Lumped and distributed capacitors, resistors, inductors, transmission lines, contacts, and complete active devices are monolithically defined, with a reduced number of process steps. An all-refractory MESFET is described, having a Schottky barrier gate and nonalloyed ohmic contacts for source and drain producible at room temperatures. Source, gate, and drain can be defined with a single mask. A thinner gold layer is formed for FET contacts than for other circuit conductors and elements by means of a configured tantalum layer buried in a thick gold layer.

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Commack, NY, United States of America

Paul R Bie