International Business Machines Corporation

Paul A Totta

James F White

Kenneth Parker Rodbell

Nicholas G Koopman

Evan G Colgan

Jeffrey F Roeder

James Gardner Ryan

Ho-Ming Tong

Sudipta Kumar Ray

Kamalesh K Srivastava

Erick G Walton

Henry Atkinson Nye, Iii

Birendra N Agarwala

Horatio Seymour Wildman

Arthur Bross

Karl J Puttlitz, Sr

Aziz M Ahsan

Hung-Chang W Huang

Adolf E Wirsing

Thomas E Dinan

Li-Chung Lee

Joseph G Schaefer

Mark F Chadurjian

Swami Mathad

Claude Louis Bertin

William R Tonti

Michael A Gaynes

Mark Vincent Pierson

Erik L Hedberg

Anilkumar Chinuprasad Bhatt

Jerzy Maria Zalesinski

William E Bernier

Kris V Srikrishnan

Patrick William Dehaven

Raj N Master

Norman G Ainslie

Paul H Palmateer

Nikhil Mohan Murdeshwar

Laura B Rothman

Joseph J Van Horn

Joseph J Gajda

Gerhard P Dahlke

J Daniel Mis

Marvin S Pittler

William W Brown, Jr

Francis T Lupul

Francis G Trudeau

Wayne J Curry

Selective electrical connections between an electronic component and a test substrate are made using an electrical conductive material. The conductive material of the present invention is a dissolvable material, allowing for rework and repair of a wafer at the wafer-level, and retesting at the wafer-level. In addition, the conductive material may also be used in a permanent package, since the conductive material of the present invention provides complete electrical conductivity and connection between the electronic component and the substrate.

Selective wafer-level testing and burn-in

An interconnect structure and method for an integrated circuit chip for resisting electromigration is described incorporating patterned interconnect layers of Al or Al--Cu and interlayer contact regions or studs of Al.sub.2 Cu between patterned interconnect layers. The invention overcomes the problem of electromigration at high current density in the interconnect structure by providing a continuous path for Cu and/or Al atoms to move in the interconnect structure.

Interconnect structure using Al.sub.2 Cu for an integrated circuit chip

A method of selectively and simultaneously depositing a non-reactive material such as a polyimide polymer to vertical sidewalls of a mesa-like structure is provided. The method of the present invention is useful in providing a modified mesa-like structure which prevents the flow of a reactive material along the vertical sidewalls of the mesa-like structure.

Use of argon sputtering to modify surface properties by thin film

Interconnect structure using Al.sub.2 -Cu for an integrated circuit chip

A structure for an improved solder terminal is disclosed. The improved solder terminal is made of a bottom metallic adhesion layer, a CrCu intermediate layer on top of the adhesion layer, a solder bonding layer above the CrCu layer and a solder top layer. The adhesion layer is either TiW or TiN. A process for fabricating an improved terminal metal consists of depositing an adhesive metallic layer, a layer of CrCu over the adhesive layer and a layer of solder bonding material, over which a solder layer is formed in selective regions and the underlying layers are etched using solder regions as a mask.

Electroplated solder terminal

An interconnect structure and method for an integrated circuit chip for resisting electromigration is described incorporating patterned interconnect layers of Al or Al-Cu and interlayer contact regions or studs of Al.sub.2 Cu between patterned interconnect layers. The invention overcomes the problem of electromigration at high current density in the interconnect structure by providing a continuous path for Cu and/or Al atoms to move in the interconnect structure.

Interconnect structure using a Al.sub.2 Cu for an integrated circuit chip

A process for an improved solder terminal is disclosed. The improved solder terminal is made of a bottom metallic adhesion layer, a CrCu intermediate layer on top of the adhesion layer, a solder bonding layer above the CrCu layer and a solder top layer. The adhesion layer is either TiW or TiN. A process for fabricating an improved terminal metal consists of depositing an adhesive metallic layer, a layer of CrCu over the adhesive layer and a layer of solder bonding material, over which a solder layer is formed in selective regions and the underlying layers are etched using solder regions as a mask.

The present invention relates generally to a new interconnection and a method for making the same, and more particularly, to an elongated solder interconnection and a method for making the same. On an electronic carrier, a pad is formed on which a solder mass is deposited and capped with a metal layer, thereby forming an elongated solder interconnection. A further elongated solder interconnection can now be formed by forming a second solder mass on the first solder mass that has been capped by a metal layer. Additional elongated solder interconnection can be formed by capping the preceding solder mass and/or the last solder mass with a metal capping layer. Alternatively, the encapsulating layer can be in the form of a sidewall spacer formed on the sidewalls of the solder mass.

Method of forming dual height solder interconnections

A low copper concentration multilayered, device interconnect metallurgy, comprises an aluminum-copper (&lt;2 weight percent copper) conductor having formed on one of its surfaces a layer of an intermetallic compound formed from a Group IVA metal and aluminum from the aluminum-copper conductor. The intermetallic compound is formed so as to contain only the single phase line compound of the intermetallic compound.

Multilayered intermetallic connection for semiconductor devices

Solder mass having conductive encapsulating arrangement

A sputtered low copper concentration multilayered, device interconnect metallurgy structure is disclosed herein. The interconnect metallization structure comprises a sputtered aluminum-copper (&lt;2) weight percent copper conductor. In the preferred embodiment, the AlCu conductor has formed on one or both of its surfaces a layer of an intermetallic compound formed from a Group IVA metal and aluminum. The Group IVA metal is deposited by sputtering. Optionally, onto said top intermetallic layer is further deposited a non-reflective, non-corrosive, etch-stop, capping layer.

A method for forming contact studs to connect the substrate component devices to the overlying wiring patterns is disclosed herein. The contact studs are formed by a combination of blanket depositing an adhesive and reactive layer into the contact opening. Onto said adhesive and reactive layer is deposited a seed layer and said contact stud is completed by filling the contact opening with a third metal layer. Preferably, the adhesive and reactive layer is a transition metal and the seen and fillter layers are refractory metals.

Contact stud structure for semiconductor devices

A method for forming contact studs to connect the substrate component devices to the overlying wiring patterns is disclosed herein. The contact studs are formed by a combination of blanket depositing an adhesive and reactive layer into the contact opening. Onto said adhesive and reactive layer is deposited a seed layer and said contact stud is completed by filling the contact opening with a third metal layer. Preferably, the adhesive and reactive layer is a transistion metal and the seed and filler layers are refractory metals.

Process for improved contact stud structure for semiconductor devices

An integrated circuit chip including a first and a higher second surface levels with an abrupt sidewall step transition therebetween, and having a first layer of a first conductive material disposed over the first surface level and over the second surface level, but terminating on the first surface level in a first end portion which extends up to but does not touch the sidewall. This end portion comprises a conductive material which has been converted to an insulator. A second layer of a second conductive material is disposed on top of the first conductive layer with essentially no conductive material conversion to insulator therein adjacent to the abrupt sidewall transition. In a preferred embodiment, the conductive material is an alloy of aluminum and the end portion is aluminum oxide.

Chip contacts without oxide discontinuities

Growing community of inventors

Poughkeepsie, NY, United States of America

Paul A Totta