Qunano Ab

Glo Ab

Patrik Svensson

Lars Samuelson

Jonas Ohlsson

Linda T Romano

Sungsoo Yi

Truls Lowgren

Nathan Fredrick Gardner

Ying-Lan Chang

Olga Kryliouk

Bo Pedersen

Thomas Mårtensson

A light emitting diode (LED) device includes a semiconductor nanowire core, and an In(Al)GaN active region quantum well shell located radially around the semiconductor nanowire core. The active quantum well shell contains indium rich regions having at least 5 atomic percent higher indium content than indium poor regions in the same shell. The active region quantum well shell has a non-uniform surface profile having at least 3 peaks. Each of the at least 3 peaks is separated from an adjacent one of the at least 3 peaks by a valley, and each of the at least 3 peaks extends at least 2 nm in a radial direction away from an adjacent valley.

III-nitride nanowire LED with strain modified surface active region and method of making thereof

A semiconductor device, such as an LED, includes a plurality of first conductivity type semiconductor nanowire cores located over a support, a continuous second conductivity type semiconductor layer extending over and around the cores, a plurality of interstitial voids located in the second conductivity type semiconductor layer and extending between the cores, and first electrode layer that contacts the second conductivity type semiconductor layer.

Coalesced nanowire structures with interstitial voids and method for manufacturing the same

The present invention relates to light emitting diodes comprising at least one nanowire. The LED according to the invention is an upstanding nanostructure with the nanowire protruding from a substrate. A bulb with a larger diameter than the nanowire is arranged in connection to the nanowire and at an elevated position with regards to the substrate. A pn-junction is formed by the combination of the bulb and the nanowire resulting in an active region to produce light.

Elevated LED

The present invention relates to semiconductor devices comprising semiconductor nanoelements. In particular the invention relates to devices having a volume element having a larger diameter than the nanoelement arranged in epitaxial connection to the nanoelement. The volume element is being doped in order to provide a high charge carrier injection into the nanoelement and a low access resistance in an electrical connection. The nanoelement may be upstanding from a semiconductor substrate. A concentric layer of low resistivity material forms on the volume element forms a contact.

Nanoelectronic structure and method of producing such

The present invention relates to growth of III-V semiconductor nanowires (2) on a Si substrate (3). Controlled vertical nanowire growth is achieved by a step, to be taken prior to the growing of the nanowire, of providing group III or group V atoms to a (111) surface of the Si substrate to provide a group III or group V 5 surface termination (4). A nanostructured device including a plurality of aligned III-V semiconductor nanowires (2) grown on, and protruding from, a (111) surface of a Si substrate (3) in an ordered pattern in compliance with a predetermined device layout is also presented.

Nanowire growth on dissimilar material

A semiconductor device, such as an LED, includes a plurality of first conductivity type semiconductor nanowire cores located over a support, a continuous second conductivity type semiconductor layer extending over and around the cores, a plurality of interstitial voids located in the second conductivity type semiconductor layer and extending between the cores, and first electrode layer that contacts the second conductivity type semiconductor layer and extends into the interstitial voids.

The present invention relates to growth of III-V semiconductor nanowires () on a Si substrate (). Controlled vertical nanowire growth is achieved by a step, to be taken prior of the growing of the nanowire, of providing group III or group V atoms to a (111) surface of the Si substrate to provide a group III or group V 5 surface termination (). A nanostructured device comprising a plurality of aligned III-V semiconductor nanowires () grown on, and protruding from, a (111) surface of a Si substrate () in an ordered pattern in compliance with a predetermined device layout is also presented.

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Palo Alto, CA, United States of America

Patrik Svensson