Micron Technology Incorporated

Round Rock Research, LLC

Keystone Technology Solutions, LLC

Patrick W Tandy

Brad D Rumsey

Todd O Bolken

David J Corisis

Joseph M Brand

Edward A Schrock

Steven G Thummel

Stephen F Moxham

Brenton L Dickey

Dana A Stoddard

Joseph C Young

Steven R Stephenson

Chad A Cobbley

David L Peters

Willam J Reeder

William Jeffery Reeder

Some embodiments include a method disposing an integrated circuit die within a housing, the integrated circuit die having integrated circuitry formed thereon, the integrated circuitry including first transponder circuitry configured to transmit and receive radio frequency signals, wherein the integrated circuit die is void of external electrical connections for anything except power supply external connections; and disposing second transponder circuitry, discrete from the first transponder circuitry, within the housing, the second transponder circuitry being configured to transmit and receive radio frequency signals, wherein the first and second transponder circuitry are configured to establish wireless communication between one another within the housing, the second transponder circuitry being disposed within 24 inches of the first transponder circuitry within the housing.

Methods of operating electronic devices, and methods of providing electronic devices

A method and apparatus for improving the laminate performance of the solder balls in a BGA package. Specifically, the ball pads on the substrate are configured to increase the shear force necessary to cause delamination of the solder balls. Conductive traces extending planarly from the pads and arranged in specified configurations will increase the shear strength of the pad.

Solder ball landpad design to improve laminate performance

A method of fabricating a circuit board is provided that includes forming a first layer of conductive material over an insulating layer, removing portions of the conductive material to define a first circuit pattern and a first rail area that is electrically isolated from the first circuit pattern, and removing portions of the conductive material from the first rail area. Optionally, the first rail area is positioned generally adjacent to a first edge of the circuit board and spans at least a portion of the length of the first edge. Optionally, portions of the conductive material of the first layer are removed to define a second rail area that is electrically isolated from the first circuit pattern and the first rail area, and portions of the conductive material of the first layer are also removed from the second rail area.

Method of forming a non-continuous conductive layer for laminated substrates

Microelectronic devices, methods of operating microelectronic devices, and methods of providing microelectronic devices are described. In one embodiment, a microelectronic device includes a microelectronic package which provides a housing within which integrated circuitry is received. An integrated circuit die is received within the microelectronic package and includes integrated circuitry formed thereon. The integrated circuitry comprises first transmit/receive circuitry configured to transmit and receive radio frequency signals. Second transmit/receive circuitry is provided, discrete from the first transmit/receive circuitry, and is contained within the microelectronic package. The second circuitry is configured to transmit and receive radio frequency signals, wherein the first and second transmit/receive circuitry are configured to establish wireless communication between one another within the microelectronic package. In another embodiment, a microelectronic package is provided having housed therein integrated circuitry. Wireless communication is produced using a transmitter inside the microelectronic package. The produced wireless communication is received using a receiver inside the microelectronic package. Responsive to the receiving of such communication, the integrated circuitry is caused to operate in a designed manner.

Methods of operating microelectronic devices, and methods of providing microelectronic devices

A packaged semiconductor device has bottom surface leads having portions of the package adjacent the lead edges excised. The outer leads may take the form of inverted-J leads, short stub leads, vertically bent leads-in-grooves, or may be entirely eliminated. Lead connections are on the bottom package surface, over the top package surface, and/or on the sides and ends of the package, enabling vertical stacking of the devices and simultaneous/alternative coplanar horizontal connections to other semiconductor devices, circuit boards, etc. A mold assembly with a castellated inner surface forms a package with alternating grooves and columns for holding side and end electrical connection surfaces.

Mold assembly for a package stack via bottom-leaded plastic (BLP) packaging

Solder ball bond pads and wire bond pads may be selectively coated so that the wire bond bond pads have a thicker gold coating than the solder ball bond pads. This may reduce the embrittlement of solder ball joints while providing a sufficient thickness of gold for the wire bonding process. In general, gold coatings are desirable on electrical contact surfaces to prevent oxidation. However, the thickness of gold which is necessary on solder ball bond pads may be less and excessive gold may be disadvantageous. Thus, by masking the solder ball bond pads during the gold coating of the wire bond bond pads, a differential gold thickness may be achieved which is more advantageous for each application.

Selectively coating bond pads

Mold assembly for a package stack via bottom-leaded plastic (blp) packaging

A method and apparatus is provided to identify defective laminate objects or package substrates having mounting sites for integrated circuit dies during the package substrate fabrication process. A hole is drilled or punched within the boundary of an individual package substrate contained within a larger laminate substrate and covered with a material layer coating composed of an opaque material such as a resist. The coating may then be selectively applied or removed at a later point during the fabrication process dependent upon whether the package substrate has been classified as defective or non-defective. After specific package substrates have been marked as defective, a light source and light collector are supplied to the fabrication process on opposite sides of the wafer. By shining the light source on the laminate substrate, defective package substrates can be identified by the passage of light through the hole which is no longer covered with resist. A package substrate may have one or many holes corresponding to one or many die mounting sites. Therefore, defective package substrates may be identified through the use of a simple light source and light collector and without the need for unnecessary expensive optical recognition or sorting machinery.

Apparatus and method for marking defective sections of laminate substrates

A fabrication method for printed circuit boards is provided, in which a conductive layer of a conductive material is formed over an insulating layer. Portions of the conductive layer are removed to define a circuit pattern and at least one rail area. The rail area comprises conductive material arranged to span substantially the length of the circuit board adjacent to an associated edge thereof, and is electrically isolated from the circuit pattern. Portions of the conductive material within the rail area are eliminated such that no continuous length of conductive material extends substantially across the length of the circuit board.

Methods, memory devices, module boards and systems are disclosed utilizing a non-continuous conductive layer in their circuit board as opposed to a substrate having a continuous length of metal such as copper from one end to the other. By ensuring that a non-continuous conductive layer is no longer present in a substrate, deformation and warping of the substrate or circuit board can be reduced. This can reduce or prevent future errors in processing from occurring due to the tight tolerance required in processing of circuit boards.

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Boise, ID, United States of America

Patrick W Tandy