Motorola Corporation

Patrick F Thompson

Barbara Vasquez

William M Williams

Scott E Lindsey

A semiconductor wafer contact system includes a sealed bladder (32) containing incompressible material. The sealed bladder (32) presses against a flexible circuit layer (28) including an array of electrical contacts (30). The bladder (32) forces the array of electrical contacts (30) against a corresponding array of device electrical contacts (12) on die (11) of a semiconductor wafer (10). The bladder (32) adapts in shape to compensate for die level and wafer level irregularities in contact height and non-parallelism. Additionally, bladder (32) ensures a constant force between membrane contacts (30) and die contacts (12), across the entire wafer (10).

Semiconductor wafer contact system and method for contacting a

A method of forming an integrated circuit assembly having a stepped interposer (300), an integrated circuit die (200) and an encapsulant (500). The stepped interposer (300) includes a central portion (320) having a plurality of contact regions (360), and a peripheral region (330), completely surrounding the central region (320), having a plurality of bonding regions (350). Some of the contact regions (360) are electrically coupled to some of the bonding regions (350). The integrated circuit die (200) includes a plurality of bonding pads (210) located around its periphery. The stepped interposer (300) is fixably coupled to the integrated circuit die (200) and some of the bonding pads (210) are electrically coupled to some of the bonding regions (350). The stepped interposer (300) of the present invention provides contact regions (360) free from encapsulant (500) and added protection for wirebonds (400) or any other means of electrical coupling.

Integrated circuit assembly having a stepped interposer and method

A semiconductor wafer contact system includes a base substrate (13) which has an array of raised supports (18). The array of raised supports (18) are distributed in a pattern corresponding to the pattern of electrical contacts (12) on the semiconductor wafer (10), to be contacted. In between the base substrate (13) and the wafer to be contacted (10) is a flexible circuit layer (14) including an array of electrical contacts (15) having the same pattern as the contacts (12) of the wafer and the raised supports (18). The raised supports (18) provide focused and localized force, pressing the membrane test contacts (15) against the wafer electrical contacts (12).

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Chandler, AZ, United States of America

Patrick F Thompson