Interconnect Portfolio LLC

Silicon Pipe, Inc.

Samsung Electronics Co., Ltd.

Iac Search and Media, Inc.

Para Kanagasabai Segaram

Kevin P Grundy

Joseph Charles Fjelstad

Gary Yasumura

William F Wiedemann

Inessa Obenhuber, Legal Representative

Thomas J Obenhuber

Belgacem Haba

Jeffrey Alan Joseph Sidlosky

Creighton W Chong

Gary Yasamura

William F Wiedermann

An IC package having multiple surfaces for interconnection with interconnection elements making connections from the IC chip to the I/O terminations of the package assembly which reside on more than one of its surfaces and which make interconnections to other devices or assemblies that are spatially separated.

Multi-surface IC packaging structures

Disclosed are low profile discrete electronic component structures that are suitable for placement and use in a vertical interconnection mode either within an electronic interconnection substrate, between interconnection substrate and electronic component or within an IC package.

Low profile discrete electronic components and applications of same

An electrical connector. An electrical connector a pair of cylindrical housings, one having a plurality of torsion bar conductors and a second having a plurality of ramps. Rotating the pair of housings relative to one another causes an angled tip on the torsion bar to rotate as it moves up the ramp. A land is provided to discontinue further rotation of the torsion bar tip as the housings continue to rotate.

Connector having a housing with a conductor with a ramp section and a curved surface section

A memory system having a plurality of memory devices and a memory controller. The memory devices are coupled to one another in a chain. The memory controller is coupled to the chain and configured to output a memory access command that is received by each of the memory devices in the chain and that selects a set of two or more of the memory devices to be accessed.

Memory chain

An electrical connector. An electrical connector comprising a connector body having a first channel and a first conductive element extending through the first channel in a first tip section. The first tip section having a first moment arm that, when forced in contact with a first conductive surface, twists the first conductive element to produce a torsion force. The torsion force holds the first tip section in contact with the first conductive surface.

Electrical connector with conductors with a ramp to induce torsion

An electrical connector comprised of a plurality of electrical contacts arranged in a stair-step configuration designed to mate with electrical components having electrical contacts arranged in a stair-step configuration. A direct connect signaling system comprised of stair-step electrical connectors mated to stair-step printed circuit boards, other stair-step electrical components, or combinations thereof.

High speed, direct path, stair-step, electronic connectors with improved signal integrity characteristics and methods for their manufacture

Disclosed are tapered dielectric and conductor structures which provide controlled impedance interconnection while signal conductor lines transition from finer pitches to coarser pitches thereby obviating electrical discontinuities generally associated with changes of circuit contact pitch. Also disclosed are methods for the construction of the devices and applications therefore.

Tapered dielectric and conductor structures and applications thereof

Memory systems including memory devices coupled together in a daisy-chained arrangement

Multi-surface IC packaging structures and methods for their manufacture

Torsionally-induced contact-force conductors for electrical connector systems

A cost effective, high performance, IC package assembly of the present invention comprises stair-stepped layers of redistribution circuits from at least one chip to terminals on any of multiple surfaces and levels of the IC package assembly. Critical path circuits of the assembly have no plated vias and are directly routed from interconnection terminals which are used to interconnect the package to the IC chip terminals by flip chip or wire bond methods.

Growing community of inventors

Brookfield, Australia

Para Kanagasabai Segaram