Google Inc.

Padam Jain

Madhusudan K Iyengar

Emad Samadiani

Connor Burgess

Yuan Hang Li

Teckgyu Kang

Jorge Padilla

Yuan Li

Feini Zhang

Yingying Wang

Norman Paul Jouppi

Christopher Gregory Malone

Woon-Seong Kwon

Melanie Beauchemin

Nicholas Stevens-Yu

Sudharshan Sugavanesh Udhayakumar

Yingshi Tang

Sue Yun Teng

Xiaojin Wei

Nicholas Chao Wei Wong

Kieran Miller

A compliant pad spacer utilized in a three-dimensional IC packaging is provided. The compliant pad spacer may be utilized to provide adequate support among the substrates or boards, such as packing substrates, interposers or print circuit broads (PCBs), so as to minimize the effects of substrate warpage or structural collapse in the IC packaging. In one example, the compliant pad spacer includes an insulating material, such as silicon-based polymer composites having ceramic fillers disposed therein.

Compliant pad spacer for three-dimensional integrated circuit package

Systems and methods for using spring force based compliance to minimize the bypass liquid flow gaps between the tops of chip microfins and bottom side of manifold ports are disclosed herein. A fluid delivery and exhaust manifold structure provides direct liquid cooling of a module. The manifold sits on top of a chip with flow channels. Inlet and outlet channels of the manifold in contact with flow channels of the chip creates an intricate crossflow path for the coolant resulting in improved heat transfer between the chip and the working fluid. The module is also designed with pressure reduction features using internal leakage flow openings to account for pressure differential between fluid entering and being expelled from the module.

Spring loaded compliant coolant distribution manifold for direct liquid cooled modules

Systems and methods for utilizing the dead space around the periphery of a chip for sealing a direct liquid cooled module are disclosed. One of the functions of a direct liquid cooled module is to provide cooling liquid to components located on a chip. A groove member for receiving a sealing member may be applied to the top surface of the chip. The groove member may be directly deposited to the top surface or coupled thereto via an adhesive and/or epoxy. The groove member may be in the form of opposing sidewalls or a u-shaped structure each of which form a partial enclosure for receipt of the sealing member. The groove member may be located entirely within the dead space or at least partially within the dead space and partially within a central area in which the chip components are located. The sealing member may be an O-ring or a gasket.

Direct liquid cooling with O-ring sealing

A method of manufacturing a chip assembly comprises joining an in-process unit to a printed circuit board; reflowing a bonding material disposed between and electrically connecting the in-process unit with the printed circuit board, the bonding material having a first reflow temperature; and then joining a heat distribution device to the plurality of semiconductor chips using a thermal interface material ('TIM') having a second reflow temperature that is lower than the first reflow temperature. The in-process unit further comprises a substrate having an active surface, a passive surface, and contacts exposed at the active surface; an interposer electrically connected to the substrate; a plurality of semiconductor chips overlying the substrate and electrically connected to the substrate through the interposer, and a stiffener overlying the substrate and having an aperture extending therethrough, the plurality of semiconductor chips being positioned within the aperture.

Methods and heat distribution devices for thermal management of chip assemblies

An IC die includes a temperature control element suitable for three-dimensional IC package with enhanced thermal control and management. The temperature control element may assist temperature control of the IC die when in operation. In one example, the temperature control element may have a plurality of thermal dissipating features disposed on a first surface of the IC die to efficiently control and dissipate the thermal energy from the IC die when in operation. A second surface opposite to the first surface of the IC die may include a plurality of devices, such as semiconductors transistors, devices, electrical components, circuits, or the like, that may generate thermal energy when in operation. The temperature control element may provide an IC die with high efficiency of heat dissipation that is suitable for 3D IC package structures and requirements.

Temperature control element utilized in device die packages

A weight optimized stiffener for use in a semiconductor device is disclosed herein. In one example, the stiffener is made of AlSiC for its weight and thermal properties. An O-ring provides sealing between a top surface of the stiffener and a component of the semiconductor device and adhesive provides sealing between a bottom surface of the stiffener and another component of the semiconductor device. The stiffener provides warpage control for a lidless package while enabling direct liquid cooling of a chip or substrate.

Weight optimized stiffener and sealing structure for direct liquid cooled modules

A device for direct liquid cooling is disclosed. The device includes a packaged assembly disposed on a substrate. The device also includes a metal channel layer having a plurality of channels disposed on top of the packaged assembly, and a top seal disposed on the metal channel layer. The top seal has at least one inlet and at least one outlet for direct liquid cooling. The metal channel layer includes copper or silver. The packaged assembly can also include silicon channels. In addition, the method of producing the device is also disclosed.

Device and method for direct liquid cooling via metal channels

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San Jose, CA, United States of America

Padam Jain