Murata Manufacturing Co., Ltd.

Noriyuki Inoue

Hiromasa Saeki

Takafumi Okamoto

Takeo Arakawa

Hitoshi Nishimura

Makito Nakano

Kazuo Hattori

Kenichi Kawasaki

Toshihiro Okamatsu

Tatsuya Funaki

Koichi Kanryo

Naoki Iwaji

Kensuke Aoki

Ken Ito

Masahiro Naito

Haruhiko Mori

Akihiro Tsuru

Kenichi Oshiumi

Akira Saito

Takehito Ishihara

Mayuko Nishihara

Masayoshi Shimizu

A capacitor is provided that includes an electrostatic capacitance forming portion with a first electrode/dielectric layer/second electrode structure, and a silicon portion. Moreover, the silicon portion is disposed on at least a part of a side of the electrostatic capacitance forming portion. When the capacitor is viewed in a thickness direction thereof, a region occupied by the silicon portion in a lower portion of the electrostatic capacitance forming portion is 50% or less.

Capacitor

A wafer level package which includes an IC chip; a rewiring layer on the IC chip; and a capacitor embedded in the rewiring layer.

Wafer level package and capacitor

A capacitor having a conductive porous substrate with at least two electrostatic capacitance forming sections, each of the at least two electrostatic capacitance forming sections including a porous portion of the conductive porous substrate, a dielectric layer on the porous portion, and an upper electrode on the dielectric layer. The at least two electrostatic capacitance forming sections are electrically connected in series by the conductive porous substrate.

A capacitor that includes a conductive base material with high specific surface area, a dielectric layer covering the conductive base material with high specific surface area, and an upper electrode covering the dielectric layer, in which the conductive base material with high specific surface area is formed of a metal sintered body as a whole.

Capacitor and method for manufacturing the same

A capacitor that includes a porous metal base material, a first buffer layer formed by an atomic layer deposition method on the porous metal base material, a dielectric layer formed by an atomic layer deposition method on the first buffer layer, and an upper electrode formed on the dielectric layer.

A capacitor that includes a porous metallic base material; a phosphorus-containing layer on the porous metallic base material; a dielectric layer on the phosphorus-containing layer; and an electrode on the dielectric layer.

A capacitor that includes a porous metal base material, a dielectric layer formed on the porous metal base material, an upper electrode formed on the dielectric layer, a first terminal electrode electrically connected to the porous metal base material, and a second terminal electrode electrically connected to the upper electrode. The porous metal base material includes a high-porosity part and low-porosity parts, and the low-porosity parts are present at a pair of opposed side surfaces of the porous metal base material.

A capacitor that includes a conductive porous base material; a dielectric layer; and an electrode. The conductive porous base material, the dielectric layer, and the upper electrode are laminated together to constitute an effective part that accumulates charges in the dielectric layer when a voltage is applied between the conductive porous base material and the electrode. The conductive porous base material includes at least one groove having a width of 10 &#x3bc;m or more at &#xbd; of a depth of the at least one groove.

In an electronic component, capacitor conductors include linear portions parallel or substantially parallel to a lower surface of a laminate, and lead-out portions led out respectively from the linear portions to the lower surface. Outer electrodes are disposed on the lower surface and cover exposed portions where the lead-out portions are exposed at the lower surface, respectively. At least one of the linear portions includes a groove, which is recessed in a direction away from the lower surface, in a region thereof overlapping with the corresponding outer electrode when looking at the electronic component in a plan view from a z-axis direction.

Electronic component

A multilayer ceramic capacitor exhibits superior life characteristics in a high temperature load test despite the use of very thin dielectric layers. As a dielectric ceramic constituting a dielectric layer of the multilayer ceramic capacitor, a perovskite-type compound is used and contains Ba and Ti (a portion of Ba can be replaced with at least one of Ca and Sr, and a portion of Ti can be replaced with Zr) as a main component, and including La within the range of 2-6 parts by mole, Mg within the range of 3-5 parts by mole, and Mn within the range of 1.5-3 parts by mole in a case where a total content of Ti and Zr is 100 parts by mole.

Multilayer ceramic capacitor and method for manufacturing multilayer ceramic capacitor

A dielectric ceramic composition contains a barium titanate based composite oxide as its main constituent, and contains a first accessory constituent including at least Al and a second accessory constituent including one or more elements selected from among Fe, Co, Ni, Cu, and Zn, wherein the content of the Al is 0.02 to 6 parts by mol with respect to 100 parts by mol of the main constituent, and the content ratio of the second accessory constituent to the Al is 0.01 to 0.4 in terms of mols. Dielectric layers are formed from a sintered body of the dielectric ceramic composition. The addition of various types of accessory elements such as rare-earth elements is possible, if necessary. This invention achieves a dielectric ceramic composition which is capable of ensuring favorable DC bias characteristics while ensuring high reliability, and a laminated ceramic capacitor using the dielectric ceramic composition.

Dielectric ceramic composition and laminated ceramic capacitor

Provided is a dielectric ceramic which exhibits desired high temperature load resistance characteristics even under a high electric field strength on the order of 15 kV/mm. The dielectric ceramic contains, as its main constituent, a perovskite compound represented by the general formula (BaCaSrGd)(TiZrHfMgZnMn)O, 0&#x2266;h&#x2266;0.03, 0&#x2266;i&#x2266;0.03; 0.042&#x2266;m&#x2266;0.074; 0.94&#x2266;k&#x2266;1.075; 0&#x2266;(y+j)&#x2266;0.05; 0.015&#x2266;n&#x2266;0.07; 0&#x2266;o&#x2266;0.04; 0&#x2266;p&#x2266;0.05; and 1.0&#x3c;m/(n+o)&#x3c;4.3. The dielectric ceramic can be used advantageously as a material for a dielectric ceramic layer provided in a laminated ceramic capacitor.

Dielectric ceramic and laminated ceramic capacitor

A laminated ceramic capacitor is provided which is excellent in reliability even when its dielectric ceramic layers thinned. For a dielectric ceramic in a laminated ceramic capacitor, a ceramic is used which includes a main component containing a barium titanate based composite oxide represented by the general formula: (BaCaSrRe)(TiZrM)O, where Re is La or the like, M is Mg or the like, and the respective relationships of 0.05&#x2266;x&#x2266;0.50, 0.02&#x2266;y&#x2266;0.3, 0.85&#x2266;k&#x2266;1.05, 0&#x2266;h&#x2266;0.25, 0&#x2266;m&#x2266;0.50, and 0&#x2266;n&#x2266;0.40 are satisfied; and an accessory component as a sintering aid, wherein the average grain diameter of crystal grains in a sintered body is 0.6 &#x3bc;m or less.

Dielectric ceramic and manufacturing method therefor and laminated ceramic capacitor

A multilayer capacitor includes a capacitor body in which internal electrodes in a first internal electrode group are overlapped with internal electrodes in a second internal electrode group with dielectric layers sandwiched therebetween. A first external electrode has a first wraparound portion and a second wraparound portion, and a second external electrode has a third wraparound portion and a fourth wraparound portion. The volume proportions of the effective layers in a first area sandwiched between the first wraparound portion and the second wraparound portion and in a third area sandwiched between the third wraparound portion and the fourth wraparound portion are set to at least about 10%. The volume proportions of the effective layers in a second area toward a lower surface in the first area and in a fourth area toward the lower surface in the third area are set to about 15% or less. The external dimensions of the multilayer capacitorare about 1.6&#xb1;0.1 mm in length by about 0.8&#xb1;0.1 mm in width by about 0.8&#xb1;0.1 mm in thickness.

Multilayer capacitor

The 'squeal' that occurs when an electric field is applied to a multilayer ceramic capacitor mounted on a substrate is suppressed by providing in an active part contributing to formation of capacitances between internal electrodes facing each other in a capacitor body, low-activity regions positioned near respective end edges of respective external electrodes. A facing area of the internal electrodes in the low-activity regions is less than or equal to one fifth that of the internal electrodes in a normal region having the same volume as that of the low-activity regions. This makes it possible to suppress occurrence of electric-field-induced distortion near the external electrodes bonded to a substrate and reduce the force that causes the substrate to bend.

Growing community of inventors

Nagaokakyo, Japan

Noriyuki Inoue