Tokyo Shibaura Denki Kabushiki Kaisha

Tokyo Shibaura Electric Co., Ltd.

Nippon Hoso' Kyokai

Norio Endo

Yoshio Nishi

Shizuo Sawada

Yukimasa Uchida

Shozo Saito

Mitsugi Ogura

Norikazu Sawazaki

Kazuhiko Hashimoto

Hisakazu Iizuka

Soichi Iwamura

Yasuaki Nishida

Masaharu Watanabe

Toshimi Yamato

A nonvolatile semiconductor memory device having a gate insulating film with a memory function. An impurity layer having the same conductivity type as that of the substrate region is formed in that substrate region, underlying the gate insulating film having a memory function, in which a channel is formed. The impurity layer has an impurity profile in which a peak of an impurity concentration is in the region distanced by 500 .ANG. or less from the surface of the substrate region and the impurity concentration is 1.times.10.sup.18 cm.sup.-3 or less in the region at the depth of 500 .ANG. or more.

Nonvolatile semiconductor memory device and method of fabricating the

A method for evaluating the measure precision of patterns such as photoresist and etched ones, and a photomask therefor. The photomask according to the present invention has a mask pattern corresponding to a pattern desired to be formed in a substrate, and also has a measure precision evaluating pattern formed at an area different from where the mask pattern is present. The measure precision evaluating pattern comprises a first measure precision evaluating pattern which has a plurality of pairs of pattern elements opposite to each other with a predetermined distance interposed therebetween, and a second measure precision evaluating pattern which has a plurality of pairs of pattern elements overlapped each other in a predetermined measure and arranged opposite to each other to form a constricted portion. The distance or the measure of overlapped area between paired pattern elements is varied with every pair of pattern elements. This mask pattern is transcribed onto the substrate and a pair of pattern elements contacting each other without overlapping is found from the transcribed pattern. Dimensional change is found from the distance or the measure of overlapped area between the pair of photomask pattern elements corresponding to that pair of pattern elements which has been found from the transcribed pattern.

Method of evaluating measure precision of patterns and photomask therefor

The invention provides a method for fabricating a semiconductor device comprising the steps of: forming an insulating layer on a semiconductor substrate; selectively forming an oxidation preventive film on the surface of said insulating layer; depositing polycrystalline silicon on the entire surface of said substrate including said oxidation preventive film; selectively etching said polycrystalline silicon so as to leave said polycrystalline silicon only around the sides of said oxidation preventive film by an etching method having a directivity perpendicular to the surface of said substrate; ion-implanting an impurity for preventing inversion in said substrate using as a mask said oxidation preventive film and said polycrystalline silicon remaining therearound; and forming a field insulator film including an oxide of said polycrystalline silicon by oxidizing the surface of said substrate. A higher integration and a higher reliability of elements may be attained according to the method of the invention.

Method for fabricating a semiconductor device

An information recording medium comprises a silicon substrate, a silicon dioxide film formed on one principal surface of the semiconductor substrate and a silicon nitride film formed on the silicon dioxide film. A recording electrode stylus is moved relative to and along the surface of the silicon nitride film while applying a recording signal voltage between the stylus and substrate, thus causing charges corresponding to the recording signal voltage to be passed through the silicon dioxide film by the tunnel effect and stored in the silicon nitride film.

Information recording medium and recording and reproducing system using

A method for manufacturing semiconductor integrated circuits such as metal oxide semiconductor field effect transistors having source and drain regions to which contact holes are made such that not only the contact parts of the source and the drain regions, but also both surface parts of a field oxide layer which are adjacent to the outer edges of source and drain regions, are exposed and contacted.

Method for manufacturing semiconductor integrated circuits utilizing

A non-volatile semiconductor memory device includes source and drain regions formed on a semiconductor substrate to define p-n junctions with the substrate and a gate layer having a silicon oxide film and a silicon nitride film. A high impurity concentration diffusion layers are formed around at least one of the source and drain regions, which have the same conductivity type as the substrate, an impurity concentration of above 10.sup.17 atoms cm.sup.-.sup.3 and a width of below 1 .mu.m.

Growing community of inventors

Yokohama, Japan

Norio Endo