Fujitsu Corporation

Norikazu Ozaki

Kenji Iida

Tomoyuki Abe

Takashi Nakagawa

Hideaki Yoshimura

Yasutomo Maehara

Seigo Yamawaki

Shin Hirano

Kiyokazu Moriizumi

Yasuhito Takahashi

Kazuaki Satoh

Yuichiro Ohta

Toshiro Katsube

Hiroyuki Katayama

Masaru Sumi

Yasunaga Kurokawa

Kazuo Nakano

Manabu Watanabe

Shunichi Kikuchi

Misao Umematsu

Zhiyi Song

Hitoshi Kanai

Kenichiro Yamada

Naoki Mukoyama

Satoru Hasegawa

Kouichi Hara

Takami Sasahara

Hiroshi Miyao

A first through hole is formed in a base, a conductive layer covering an inner wall side surface of the first through hole is formed, a columnar electric conductor having a Vickers hardness of a value in a range of 30 Hv or more and 400 Hv or less is inserted into the first through hole formed with the conductive layer, pressure is applied in a vertical direction to the columnar electric conductor, and a second through hole is formed in the columnar electric conductor.

Method of manufacturing substrate and substrate

Provided is a circuit board including a resin base, and a resistance element formed above the resin base. The resistance element includes a resistance pattern including an electrode portion and an extending portion, and an electrode formed on the electrode portion of the resistance pattern and including a foot portion reduced in thickness toward the extending portion.

Circuit board, method of manufacturing the same, and resistance element

The method of producing a substrate comprises the steps of: forming a through-hole in a base member; filling the through-hole with an insulating material; performing electroless plating to coat the surface of the base member, in which the through-hole has been filled with the insulating material, with an electroless-plated layer; applying photo resist on the electroless-plated layer formed on the surface of the base member; optically exposing and developing the photo resist so as to form a resist pattern coating an end face of the through-hole filled with the insulating material; etching an electrically conductive layer formed on the surface of the base member with using the resist pattern as a mask; and removing the resist pattern coating the end face of the through-hole from the base member with using the electroless-plated layer as a release layer.

Method of producing substrate

The circuit board is capable of tightly bonding a cable layer on a base member even if thermal expansion coefficients of the base member and the cable layer are significantly different. The circuit board comprises: the base member; and the cable layer being laminated on the base member with anchor patterns, which are electrically conductive layers formed on a surface of the base member.

Circuit board and method of producing the same

The method of producing a substrate comprises the steps of: forming a through-hole in a base member; plating the base member so as to coat an inner face of the through-hole with a plated layer; applying photo resist on the base member; optically exposing and developing the photo resist so as to form a resist pattern, which coats at least a planar area of the through-hole; and etching an electrically conductive layer formed on the surface of the base member. The resist pattern is formed so as to separate an area of exposing the conductive layer a prescribed distance away from an edge of the through-hole, and the prescribed length is longer than a distance of etching a side face of the conductive layer in the etching step.

The core substrate is capable of securely preventing short circuit between an electrically conductive core section and a plated through-hole section. The core substrate comprises: an electrically conductive core section having a pilot hole, through which a plated through-hole section is formed; electrically conductive layers coating the inner face of the pilot hole and a surface of the core section; a gas purging hole being formed in the conductive layer coating the surface of the core section; an insulating material filling a space between the inner face of the pilot hole and an outer circumferential face of the plated through-hole section; and cable layers being laminated on both side faces of the core section.

Core substrate and method of producing the same

The magnetoresistance is measured for a magnetoresistive layered-structure, such as a spin valve film, prior to formation of an upper shield layer as well as patterning of a lower shield layer. The magnetic influence of the upper and lower shield layers can completely be eliminated during the measurement of the magnetoresistance. The magnetoresistive layered-structure is allowed to reliably receive the magnetic field over a wider range including a lower magnetic field range. It is accordingly possible to measure the magnetoresistance properly reflecting the magnetic characteristic of the magnetoresistive layered-structure. It is possible to find deficiency of a magnetoresistive read element at an earlier stage of the method.

Method of accurate evaluation on magnetoresistive read element

The method comprises forming a plurality of wiring pattern layers on the front surface of a substrate. In the process of forming the wiring pattern layers, an insulator protection film keeps covering over the wiring pattern on the back surface of the substrate. When the formation of the wiring pattern layers has been completed on the front surface of the substrate, a penetrating hole is bored in the cured or hardened insulator protection film. The penetrating hole may be utilized as a conductive via or a conductive through hole. A wiring pattern layer is then formed over the hardened insulator protection film on the back surface of the substrate. It is possible to omit an additional process for removing the insulator protection film. The method contributes to further facilitation of production process and further reduction in production cost.

Method of producing double-sided circuit board

A dummy pad is formed through a polyimide insulating layer so as to be provided opposite to a via connecting pad formed on the surface of a ceramic substrate. A defect occurring in the via connecting pad is filled with a protrusion when the dummy pad is formed. Accordingly, the influence of the defect upon a layer above the dummy pad is prevented. Further, in a method for manufacturing a thin film wiring board obtained by forming a thin film layer on a base substrate having a via that allows interlayer electric conduction, a void defect existing in the via is filled with a conductive material having corrosion resistance against an etchant, and then the thin film layer is formed on the base substrate.

Thin film wiring board and method for manufacturing the same, base substrate and method for manufacturing the same

A multi-layer wiring substrate includes a main substrate and a plurality of insulating films stacked on the main substrate. The plurality of insulating films have wiring patterns formed on wiring regions thereof and dummy wiring patterns formed on peripheral regions of the wiring regions. The wiring patterns include signal wiring patterns, power supply wiring patterns, and vias. The dummy wiring patterns correspond to the wiring patterns, respectively.

Multi-layer wiring substrate

A process for fabricating thin multi-layer circuit boards. A substrate is disposed over a heat-accumulating block adjacent thereto so that it is uniformly heated from the back side thereof during the pre-baking.

Process for fabricating a thin multi-layer circuit board

A thin multi-layer circuit board having alternately stacked wiring pattern layers, including a top wiring pattern layer and insulating layers on an insulating plate-like substrate. The wiring pattern layers are electronically connected through vias in the insulating layers to form a predetermined circuit pattern by said wiring pattern layers. A metallic barrier layer is formed on the top wiring pattern layer, except at an exclusion zone of the metallic barrier layer. An electronic part-mounting pad layer and a remodeling pad layer are formed on the metallic barrier layer. The remodeling pad layer is arranged adjacent the electronic part-mounting pad layer, with the exclusion zone therebetween.

Thin multi-layer circuit board having a remodeling pad layer and a metallic barrier layer with an exclusion zone

A polishing method for planarizing a substrate which provides an efficient polishing so that a time needed for polishing is reduced as compared to the conventional method. A first polishing process removes a portion of a polish stop layer that covers a high area by using a first slurry having a high polishing capability against the polish stop layer. A second polishing process, subsequent to the first polishing process, removes the high area by using a second slurry having a high polishing capability for polishing a material covered by the polish stop layer. A polishing capability of the second slurry for polishing the polish stop layer is lower than the polishing capability of the first slurry for polishing the polish stop layer.

Polishing method for planarizing a substrate

A process for fabricating thin multi-layer circuit boards which allow the electrical conduction of remodeling pads to be easily cut do not use etching for gold, avoid the lift-off method for forming a thin chromium film on the wiring pattern layer, allow a defective wiring pattern layer to be removed, and which uses uniform heating of the substrate, from the back side thereof, at the time of pre-baking. A barrier metal (60) is excluded from a portion where the electrical conduction of a remodeling pad (62b) is to be cut (FIGS. 1 to 16). Alternatively, gold-plating resist is formed in order to avoid the etching for gold (FIGS. 17 to 19). Alternatively, a thin chromium film is formed in advance by etching on the wiring pattern layer (FIGS. 27 to 33). Alternatively, a metallic barrier film (122) is formed on each of the wiring pattern layers so that the wiring pattern layer can be removed without affecting other wiring pattern layers (FIGS. 36 to 42). Alternatively, the substrate is disposed over a heat-accumulating block (138) adjacent thereto so that it is uniformly heated from the back side thereof during the pre-baking.

Thin multi-layer circuit board and process for fabricating the same

A method for forming an acrylic resist on a surface of a copper layer includes the steps of processing a surface of the copper layer by an ammonia water, and depositing a layer of acrylic resist on the surface of the copper layer after a processing by the ammonia water.

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Kawasaki, Japan

Norikazu Ozaki