Hitachi, Ltd.

Hitachi-High-Technologies Corporation

Renesas Technology Corp.

Nobuyuki Iriki

Susumu Komoriya

Takao Kawanabe

Shinya Nakagawa

Takayoshi Oosakaya

Tadashi Otaka

Yasutsugu Usami

Yasuhiro Mitsui

Yuya Toyoshima

Isao Kawata

Kenji Watanabe

Shinji Kuniyoshi

Hisashi Maejima

Tsutomu Okabe

A test pattern formed in a scribe line area of a wafer is irradiated with a light beam to measure the width thereof; the test pattern is irradiated with an electron beam so as to measure the width thereof; an amount of change in the width of the test pattern is calculated; a dummy pattern having the same width as that of a semiconductor device of the wafer is irradiated with an electron beam to measure the width thereof; and the width of a pattern is estimated by the use of the calculated amount of width change so as to determine the shape of the pattern. Thus, a shape measuring system and method capable of determining the shape of a micropattern in a semiconductor device without changing the dimensions of the micropattern can be provided.

Micropattern shape measuring system and method

The efficiency is improved for a lithography step in a process of manufacturing semiconductor integrated circuits. For each semiconductor wafer, the method has a step of depositing a photosensitive organic film, a step of performing exposure processing, a step of performing development processing, a step of conducting a test, and a consistent processing step for removing the photosensitive organic film of a semiconductor wafer determined as nonstandard in the test in the processing unit for depositing the photosensitive organic film, and returning again to the step of depositing the photosensitive organic film to regenerate the semiconductor wafer. During the regeneration processing for the semiconductor wafer, other processing is automatically performed in parallel for other semiconductor wafers of the plurality of semiconductor wafers in a system for performing the consistent processing.

Method of manufacturing and testing semiconductor integrated circuit device

A semiconductor integrated circuit device fabrication technique improves the accuracy of element qualities by considering the influence of interaction of element quality parameters in the quality control of semiconductor fabrication processes and also by improving the product yield estimation accuracy so that the production efficiency can be improved. An initial value of a membership function is first set and then a plurality of element quality parameters and a combined quality parameter are expressed by membership functions in fuzzy control in a semiconductor fabrication apparatus for automating a fabrication method by connecting a computer with various measuring instruments and various processors by communication devices. Moreover, the combined quality parameters are fuzzy-inferred from the element quality parameters using these membership functions, inference rules are adjusted by data of the actual processes, the membership functions of the obtained element quality parameters are converted into an element quality control standard, and the semiconductor integrated circuit device fabrication processes are controlled in accordance with the standard.

Semiconductor integrated circuit device fabrication method and its

According to the present invention, in making alignment between a semiconductor integrated circuit wafer and a mask or a reticle in light exposure of the wafer with a monochromatic light such as g-, i- or h-line of a mercury lamp, using a reduced stepping exposure system, light from a predetermined pattern on the wafer is taken out to an off-axis position and observed according to Through-the-Lens method; in this case as a characteristic feature of the invention, the observation light taken out from below the reticle is passed through chromatic aberration correcting lenses, thereby permitting the use of a polychromatic or continuous spectrum light.

Method of making semiconductor integrated circuit, pattern detecting

According to the present invention, in making alignment between a semiconductor integrated circuit wafer and a mask or a reticle in light exposure of the wafer with a monochromatic light such as g-, i- or h-line of a mercury lamp, using a reduced stepping exposure system, light from a predetermined pattern on the wafer is taken out to an off-axis position and observed according to a through-the-lens method; in this case as a characteristic feature of the invention, the, observation light is taken out from below the reticle and is passed through chromatic aberration correcting lenses, thereby permitting the use of a polychromatic or continuous spectrum light.

According to the present invention, in making alignment between a semiconductor integrated circuit wafer and a mask or a reticle in light exposure of the wafer with a monochromatic light such as g-, i- or h- line of a mercury lamp, using a reduced stepping exposure system, light from a predetermined pattern on the wafer is taken out to an off-axis position and observed according to a through-the-lens method; in this case as a characteristic feature of the invention, the observation light is taken out from below the reticle and is passed through chromatic aberration correcting lenses, thereby permitting the use of a polychromatic or continuous spectrum light.

Growing community of inventors

Kodaira, Japan

Nobuyuki Iriki