Sharp Kabushiki Kaisha Corporation

Nobuhito Ogata

Masaya Nagata

Jun Kudo

Yasuyuki Itoh

Seiichi Yokoyama

Shun Mitarai

Kazuya Ishihara

A semiconductor memory device includes: a capacitor formed on a substrate and including a lower electrode, a dielectric film and an upper electrode; a selection transistor formed at the substrate; an electrically conductive plug for providing electrical connection between the selection transistor and the capacitor; and a diffusion barrier film provided between the electrically conductive plug and the lower electrode of the capacitor. The diffusion barrier film is a Ta Si N film or a Hf Si N film (where 0.2<x<1 and 0<y<1). The lower electrode includes an Ir film and an IrO film which are sequentially formed.

Semiconductor device including capacitor with lower electrode including iridium and iridium oxide layers

A semiconductor memory device includes: a capacitor formed on a substrate and including a lower electrode, a dielectric film and an upper electrode; a selection transistor formed at the substrate; an electrically conductive plug for providing electrical connection between the selection transistor and the capacitor; and a diffusion barrier film provided between the electrically conductive plug and the lower electrode of the capacitor. The diffusion barrier film is a Ta,Si,N,film or a Hf,Si,N,film (where 0.2<x<1 and 0<y<1). The lower electrode includes an Ir film and an IrO,film which are sequentially formed.

Semiconductor memory device and production method of the same

In a method for fabrication a semiconductor memory device which has a capacitor having a lower electrode, a dielectric film and an upper electrode stacked in this order, after the dielectric film is formed to a desired film thickness, the dielectric film is flattened by removing the dielectric film by a specified amount. The upper electrode is formed on the flattened

Growing community of inventors

Tenri, Japan

Nobuhito Ogata